Alder Lake is
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and Delaware General Corporation Law, incorporated in Delaware. Intel designs, manufactures, and sells computer compo ...
's
codename
A code name, codename, call sign, or cryptonym is a code word or name used, sometimes clandestinely, to refer to another name, word, project, or person. Code names are often used for military purposes, or in espionage. They may also be used in ...
for the 12th generation of
Intel Core
Intel Core is a line of multi-core (with the exception of Core Solo and Core 2 Solo) central processing units (CPUs) for midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors ...
processors based on a
hybrid architecture utilizing
Golden Cove
Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process ...
performance cores and
Gracemont efficient cores.
It is fabricated using Intel's
Intel 7 process, previously referred to as Intel 10 nm Enhanced SuperFin (10ESF).
The 10ESF has a 10%-15% boost in performance over the 10SF used in the mobile
Tiger Lake processors. Intel officially announced 12th Gen Intel Core CPUs on October 27, 2021,
mobile CPUs and non-K series desktop CPUs on January 4, 2022,
Alder Lake-P and -U series on February 23, 2022, and Alder Lake-HX series on May 10, 2022.
History
It was announced in November 2021 that Intel Alder Lake would use a hybrid architecture combining performance and efficiency cores, similar to
ARM big.LITTLE. This was Intel's second hybrid architecture, after the mobile-only
Lakefield released in June 2020. While the desktop Alder Lake processors were already on the market by January 2022, the mobile processors were not, although release was expected early that year. Starting cost were USD $289 for the Core i5-12600K. Gracemont was the name given to the efficiency cores, while
Golden Cove
Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process ...
cores were set for tasks such as gaming and video processing.
First laptop tests were performed later that month, with
PCMag
''PC Magazine'' (shortened as ''PCMag'') is an American computer magazine published by Ziff Davis. A print edition was published from 1982 to January 2009. Publication of online editions started in late 1994 and continues .
Overview
''PC Magaz ...
positively reviewing the Core i9-12900HK, stating the H series represented "Intel's enthusiast line," with "the same hybrid designs" also in the P-series and U-series chips to come out later that year.
In April 2022, press reported on "hints" that Intel was working on Alder Lake-X.
Intel officially announced the HX processor series on May 10, 2022, including Core i5, Core i7 and Core i9 models,
when Intel announced "seven new mobile processors for the 12th Gen Intel Core mobile family at its Intel Vision event. With the lineup based on Intel's desktop Alder Lake chips,
it was named the Alder Lake-HX series, or 12th-gen Core HX, with the Core i9-12950HX as the flagship and Intel's first 16-core chip designed for laptops.
Features
CPU
* Golden Cove performance cores ("P-cores")
** Dedicated floating-point adders
** New 6-wide instruction decoder (from 4-wide in
Rocket Lake
Rocket Lake is Intel's codename for its 11th generation Core microprocessors. Released on March 30, 2021, it is based on the new Cypress Cove microarchitecture, a variant of Sunny Cove (used by Intel's Ice Lake mobile processors) backporte ...
/
Tiger Lake) with the ability to fetch up to 32 bytes of instructions per cycle (from 16)
** 12 execution ports (from 10)
** 512 reorder-buffer entries (from 352)
** 6-wide μOP allocations (from 5)
** TAGE-like directional branch predictor (with a global history size of 194 taken branches)
** μOP cache size increased to 4K entries (up from 2.25K)
**
AVX-VNNI, a
VEX-coded variant of
AVX512-VNNI for 256-bit vectors
**
AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
(including FP16) is present but disabled by default to match E-cores. On early revisions of microprocessors it still can be enabled on some motherboards with some BIOS versions by disabling the E-cores.
Intel has physically fused off AVX-512 on later revisions of Alder Lake CPUs manufactured in early 2022 and onward.
** ~18%
IPC uplift.
* Gracemont efficient cores ("E-cores")
** Aggregated into 4-core clusters with a shared 2MB
L2 cache
** 256 reorder-buffer entries (up from 208 in
Tremont)
** 17 execution ports (up from 12)
**
AVX2
Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...
,
FMA and
AVX-VNNI
**
Skylake-like
IPC.
* New instruction set extensions:
** PTWRITE
** SERIALIZE
** HRESET
** User-mode wait (WAITPKG): TPAUSE, UMONITOR, UMWAIT
* Up to 1 TB/s interconnect between cores
* Intel Thread Director (only for CPUs with P and E-cores), which is a marketing name for Enhanced Hardware Feedback Interface (EHFI). This is a hardware technology to assist the OS thread scheduler with more efficient load distribution between heterogeneous CPU cores.
Enabling this new capability requires support in the operating system.
* Architectural last branch records (LBRs)
* Hypervisor-managed linear address translation (HLAT)
* Control-flow enforcement technology (
CET), including support for indirect branch tracking (IBT) and
shadow stack (SS)
* 4–30 MB
L3 cache
* Cores:
** up to 8 P-cores and 8 E-cores on desktop
** up to 6 P-cores and 8 E-cores on mobile (UP3 designs)
** up to 2 P-cores and 8 E-cores on ultra mobile (UP4 designs)
** only P-cores feature
hyper-threading
GPU
*
Intel Xe-LP (Gen 12.2) GPU
* Up to 96 EU on mobile and 32 EU on desktop
* Up to 4 displays
I/O
*
LGA 1700
LGA 1700 (Socket V) is a zero insertion force flip-chip land grid array (LGA) socket, compatible with Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, ...
socket for desktop processors.
*
BGA1744 Type3 and Type4 HDI for mobile processors
* 20
PCIe lanes from CPU
** 16 PCIe 5.0 lanes
** 4 PCIe 4.0 lanes
* Chipset link -
DMI 4.0 ×8 link with Intel 600 series PCH chipsets
*
DDR5,
DDR4,
LPDDR5, and
LPDDR4X memory support
** Up to DDR5-4800
** Up to DDR4-3200
** Up to LPDDR5-5200
** Up to LPDDR4x-4267
** XMP 3.0
** Dynamic Memory Boost
* Integrated
Thunderbolt 4 and
WiFi 6E support
** Supported via PCH on desktop processors
** Directly supported by CPU on non-HX mobile processors
** No support on HX mobile processors, could be added via external controller
Dies

For the Alder Lake generation, Intel produced 4 different dies.
Each die has a different number of P-cores (P) and E-cores (E) and GPU Execution Units.
Software support
Alder Lake requires special support from the operating system due to its relatively unusual-for-x86 hybrid nature. For software unable to be upgraded, a
UEFI
Unified Extensible Firmware Interface (UEFI, as an acronym) is a Specification (technical standard), specification for the firmware Software architecture, architecture of a computing platform. When a computer booting, is powered on, the UEFI ...
-provided compatibility mode may be used to disable the E-cores; it is enabled by the user turning on
scroll lock.
[
]
CPUID incoherence
The P-cores and E-cores on early versions of Alder Lake CPUs reported different CPUID models. This has caused issues with digital rights management
Digital rights management (DRM) is the management of legal access to digital content. Various tools or technological protection measures, such as access control technologies, can restrict the use of proprietary hardware and copyrighted works. DRM ...
systems that perceive the P-cores and E-cores as being separate computers, and falsely enforce license
A license (American English) or licence (Commonwealth English) is an official permission or permit to do, use, or own something (as well as the document of that permission or permit).
A license is granted by a party (licensor) to another part ...
restrictions preventing a particular piece of software from being executed on more than one device at a time. Intel published a list of PC games it identified as having this compatibility issue, and stated that it was working with publishers to develop patches. Some of the games were identified by Intel as only having this bug on Windows 10
Windows 10 is a major release of Microsoft's Windows NT operating system. The successor to Windows 8.1, it was Software release cycle#Release to manufacturing (RTM), released to manufacturing on July 15, 2015, and later to retail on July 2 ...
, and functioning correctly on Windows 11
Windows 11 is a version of Microsoft's Windows NT operating system, released on October 5, 2021, as the successor to Windows 10 (2015). It is available as a free upgrade for devices running Windows 10 that meet the #System requirements, Windo ...
(with some of them dependent on Windows 11 patches scheduled to be released in November 2021). ExamSoft similarly stated that its monitoring software for educational assessment
Educational assessment or educational evaluation is the systematic process of documenting and using empirical data on the knowledge, skill, Attitude (psychology), attitudes, aptitude and beliefs to refine programs and improve student learning. Ass ...
s (such as the bar examination
A bar examination is an examination administered by the bar association of a jurisdiction that a lawyer must pass in order to be admitted to the bar of that jurisdiction.
Australia
Administering bar exams is the responsibility of the bar associat ...
) was similarly incompatible with Alder Lake CPUs due to checks detecting virtual machine
In computing, a virtual machine (VM) is the virtualization or emulator, emulation of a computer system. Virtual machines are based on computer architectures and provide the functionality of a physical computer. Their implementations may involve ...
s.
This problem has been fixed in a microcode
In processor design, microcode serves as an intermediary layer situated between the central processing unit (CPU) hardware and the programmer-visible instruction set architecture of a computer. It consists of a set of hardware-level instructions ...
update. The P and E cores now return the same CPUID when both are enabled. A different CPUID is reported when E-cores are disabled and only P-cores are enabled. The AVX-512
AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and first implemented in the 2016 Intel Xeon Phi x200 (Knights Landing), and then ...
instruction set
In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, s ...
extension is implemented in the P-cores but disabled due to incompatibility with the E-cores. Hacker
A hacker is a person skilled in information technology who achieves goals and solves problems by non-standard means. The term has become associated in popular culture with a security hackersomeone with knowledge of bug (computing), bugs or exp ...
s have shown that it is possible to enable the AVX-512 instructions on the P-cores when the E-cores are disabled and an old microcode version is used.
There are minor differences between the behavior of the two cores with regard to an undefined overflow flag in certain bitwise operations.
Scheduler support
Alder Lake's CPU topology has performance implications, especially for gaming environments where the developers are not used to NUMA setups. Microsoft added support for Intel Thread Director (ITD) in Windows 11
Windows 11 is a version of Microsoft's Windows NT operating system, released on October 5, 2021, as the successor to Windows 10 (2015). It is available as a free upgrade for devices running Windows 10 that meet the #System requirements, Windo ...
. A wide variety of inputs, including whether a process' window is in the foreground, feeds into the ITD. The ITD can function to a lesser extent with the OS providing less or no cooperation. Support in Linux is merged in kernel 5.18 but this alone is not sufficient until the kernel gets hints from userspace in order to schedule tasks to run on certain types of cores. Windows 10 version 21H2 and later Windows 10
Windows 10 is a major release of Microsoft's Windows NT operating system. The successor to Windows 8.1, it was Software release cycle#Release to manufacturing (RTM), released to manufacturing on July 15, 2015, and later to retail on July 2 ...
has support for Intel Thread Director, but such support is limited.
Blu-Ray DRM support
The CPU family no longer features Intel SGX which is a requirement for playing UltraHD Blu-Ray
Blu-ray (Blu-ray Disc or BD) is a digital optical disc data storage format designed to supersede the DVD format. It was invented and developed in 2005 and released worldwide on June 20, 2006, capable of storing several hours of high-defin ...
discs.
List of 12th generation Alder Lake processors
Desktop processors (Alder Lake-S)
* All the CPUs support up to 128 GB of DDR4-3200 or DDR5-4800 RAM in dual channel mode and up to 256 GB of DDR5 after a BIOS upgrade.
* All the CPUs support 16x PCI Express
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripher ...
Gen 5 and 4x PCI Express Gen 4 lanes, but support may vary depending on motherboard and chipsets.
* Models without the F suffix feature any one of the following integrated UHD Graphics GPUs, all with base frequency of 300 MHz:
** UHD Graphics 770 with 32 EUs,
** UHD Graphics 730 with 24 EUs,
** UHD Graphics 710 with 16 EUs.
* By default, Alder Lake CPUs are configured to run at Turbo Power at all times and Base Power is only guaranteed when P-Cores/E-cores do ''not'' exceed the base clock rate.
* Max Turbo Power: the maximum sustained (> 1 s) power dissipation of the processor as limited by current and/or temperature controls. Instantaneous power may exceed Maximum Turbo Power for short durations (≤ 10 ms). Maximum Turbo Power is configurable by system vendor and can be system specific.
* CPUs in bold below feature ECC memory
Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct ''n''-bit data corruption which occurs in memory.
Typically, ECC memory maintains a memory system immun ...
support only when paired with a motherboard based on the W680 chipset.
* By default, Core i9-12900KS achieves 5.5 GHz only when using Thermal Velocity Boost.
Mobile processors
Alder Lake-HX
* desktop processors repurposed for mobile usage.
* features UHD Graphics GPU with 32 EUs (i5-12450HX only has 16 EUs)
* CPUs in bold below feature ECC memory
Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct ''n''-bit data corruption which occurs in memory.
Typically, ECC memory maintains a memory system immun ...
support only when paired with a motherboard based on the WM690 mobile workstation chipset.
These CPUs feature 35 W minimum assured, 45 W base and 157 W maximum turbo power consumption.
Alder Lake-H
These CPUs feature 35 W minimum assured, 45 W base and 95 W (Core i5) or 115 W (Core i7/i9) maximum turbo power consumption.
Alder Lake-P
These CPUs feature 20 W minimum assured, 28 W base and 64 W maximum turbo power consumption.
Alder Lake-U
Alder Lake-N
These CPUs feature only E-cores and have 6MB of Smart Cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...
.
Twin lake-N
These CPUs feature only E-cores and have 6MB of Smart Cache
A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, which ...
.
Processors for Internet of Things (IoT) devices and embedded systems (Alder Lake-PS)
Most of these processors are identical to the corresponding Alder Lake-H and Alder Lake-U processors (without the L suffix) listed above.
High-power
These CPUs feature 35 W minimum assured, 45 W base and 65 W maximum assured power consumption.
Low-power
These CPUs feature 12 W minimum assured, 15 W base and 28 W maximum assured power consumption.
See also
* Intel Core
Intel Core is a line of multi-core (with the exception of Core Solo and Core 2 Solo) central processing units (CPUs) for midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors ...
* Intel Lakefield
* Sapphire Rapids
Sapphire Rapids is a codename for Intel's server (fourth generation Xeon Scalable) and workstation (Xeon W-2400/2500 and Xeon W-3400/3500) processors based on the Golden Cove microarchitecture and produced using Intel 7. It features up to 60 c ...
, Intel's 4th generation Xeon server processors based on Golden Cove
Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process ...
microarchitecture and Intel 7 process
* List of Intel CPU microarchitectures
* LGA 1700
LGA 1700 (Socket V) is a zero insertion force flip-chip land grid array (LGA) socket, compatible with Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, ...
Socket
Notes
References
{{Intel processor roadmap
Intel x86 microprocessors
X86 microarchitectures
Computer-related introductions in 2021
Intel microarchitectures