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UClibc
__NOTOC__ In computing, uClibc (sometimes written µClibc) is a small C standard library intended for Linux kernel-based operating systems for embedded systems and mobile devices. uClibc was written to support μClinux, a version of Linux not requiring a memory management unit and thus suited for microcontrollers (uCs; the "u" is a Latin script typographical approximation - not a proper romanization, which would be letter "m" - of μ for "micro"). Development on uClibc started around 1999. uClibc was mostly written from scratch, but has incorporated code from glibc and other projects. The project lead is Erik Andersen, and the other main contributor is Manuel Novoa III. Licensed under the GNU Lesser General Public License, uClibc is free and open-source software. uClibc is much smaller than the glibc, the C library normally used with Linux distributions. While glibc is intended to fully support all relevant C standards across a wide range of hardware and kernel pla ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
C (programming Language)
C (''pronounced like the letter c'') is a general-purpose computer programming language. It was created in the 1970s by Dennis Ritchie, and remains very widely used and influential. By design, C's features cleanly reflect the capabilities of the targeted CPUs. It has found lasting use in operating systems, device drivers, protocol stacks, though decreasingly for application software. C is commonly used on computer architectures that range from the largest supercomputers to the smallest microcontrollers and embedded systems. A successor to the programming language B, C was originally developed at Bell Labs by Ritchie between 1972 and 1973 to construct utilities running on Unix. It was applied to re-implementing the kernel of the Unix operating system. During the 1980s, C gradually gained popularity. It has become one of the most widely used programming languages, with C compilers available for practically all modern computer architectures and operating systems. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Linux Kernel System Call Interface And UClibc
Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, which includes the kernel and supporting system software and libraries, many of which are provided by the GNU Project. Many Linux distributions use the word "Linux" in their name, but the Free Software Foundation uses the name "GNU/Linux" to emphasize the importance of GNU software, causing some controversy. Popular Linux distributions include Debian, Fedora Linux, and Ubuntu, the latter of which itself consists of many different distributions and modifications, including Lubuntu and Xubuntu. Commercial distributions include Red Hat Enterprise Linux and SUSE Linux Enterprise. Desktop Linux distributions include a windowing system such as X11 or Wayland, and a desktop environment such as GNOME or KDE Plasma. Distributions intended for servers may ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
V850
V850 is a 32-bit RISC CPU architecture produced by Renesas Electronics for embedded microcontrollers. It was designed by NEC as a replacement for their earlier NEC V60 family, and was introduced shortly before NEC sold their designs to Renesas in the early 1990s. It has continued to be developed by Renesas . The V850 architecture is a load/store architecture with 32 32-bit general-purpose registers. It features a compressed instruction set with the most frequently used instructions mapped onto 16-bit half-words. Intended for use in ultra-low power consumption systems, such as those using 0.5 mW/ MIPS, the V850 has been widely used in a variety of applications, including optical disk drives, hard disk drives, mobile phones, car audio, and inverter compressors for air conditioners. Today, microarchitectures primarily focus on high performance and high reliability, such as the dual-lockstep redundant mechanism for the automotive industry; and the V850 and RH850 families a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SPARC
SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed in the early 1980s. First developed in 1986 and released in 1987, SPARC was one of the most successful early commercial RISC systems, and its success led to the introduction of similar RISC designs from many vendors through the 1980s and 1990s. The first implementation of the original 32-bit architecture (SPARC V7) was used in Sun's Sun-4 computer workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 series of processors. SPARC V8 added a number of improvements that were part of the SuperSPARC series of processors released in 1992. SPARC V9, released in 1993, introduced a 64-bit architecture and was first released in Sun's UltraSPARC processors in 1995. Later, SPARC processors were used in ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SuperH
SuperH (or SH) is a 32-bit reduced instruction set computing (RISC) instruction set architecture (ISA) developed by Hitachi and currently produced by Renesas. It is implemented by microcontrollers and microprocessors for embedded systems. At the time of introduction, SuperH was notable for having fixed-length 16-bit instructions in spite of its 32-bit architecture. This was a novel approach; at the time, RISC processors always used an instruction size that was the same as the internal data width, typically 32 bits. Using smaller instructions had consequences: the register file was smaller and instructions were generally two-operand format. But for the market the SuperH was aimed at, this was a small price to pay for the improved memory and processor cache efficiency. Later versions of the design, starting with SH-5, included both 16- and 32-bit instructions, with the 16-bit versions mapping onto the 32-bit version inside the CPU. This allowed the machine code to continue using t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC
PowerPC (with the backronym Performance Optimization With Enhanced RISC – Performance Computing, sometimes abbreviated as PPC) is a reduced instruction set computer (RISC) instruction set architecture (ISA) created by the 1991 Apple– IBM–Motorola alliance, known as AIM. PowerPC, as an evolving instruction set, has been named Power ISA since 2006, while the old name lives on as a trademark for some implementations of Power Architecture–based processors. PowerPC was the cornerstone of AIM's PReP and Common Hardware Reference Platform (CHRP) initiatives in the 1990s. Originally intended for personal computers, the architecture is well known for being used by Apple's Power Macintosh, PowerBook, iMac, iBook, eMac, Mac Mini, and Xserve lines from 1994 until 2005, when Apple migrated to Intel's x86. It has since become a niche in personal computers, but remains popular for embedded and high-performance processors. Its use in 7th generation of video game consoles and ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MIPS Architecture
MIPS (Microprocessor without Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA)Price, Charles (September 1995). ''MIPS IV Instruction Set'' (Revision 3.2), MIPS Technologies, Inc. developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. There are multiple versions of MIPS: including MIPS I, II, III, IV, and V; as well as five releases of MIPS32/64 (for 32- and 64-bit implementations, respectively). The early MIPS architectures were 32-bit; 64-bit versions were developed later. As of April 2017, the current version of MIPS is MIPS32/64 Release 6. MIPS32/64 primarily differs from MIPS I–V by defining the privileged kernel mode System Control Coprocessor in addition to the user mode architecture. The MIPS architecture has several optional extensions. MIPS-3D which is a simple set of floating-point SIMD instructions dedicated to common 3D tasks, MDMX (MaDMaX) which is a more extens ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
M68k
The Motorola 68000 series (also known as 680x0, m68000, m68k, or 68k) is a family of 32-bit complex instruction set computer (CISC) microprocessors. During the 1980s and early 1990s, they were popular in personal computers and workstations and were the primary competitors of Intel's x86 microprocessors. They were best known as the processors used in the early Apple Macintosh, the Sharp X68000, the Commodore Amiga, the Sinclair QL, the Atari ST, the Sega Genesis (Mega Drive), the Capcom System I (Arcade), the AT&T UNIX PC, the Tandy Model 16/16B/6000, the Sun Microsystems Sun-1, Sun-2 and Sun-3, the NeXT Computer, NeXTcube, NeXTstation, and NeXTcube Turbo, the Texas Instruments TI-89/TI-92 calculators, the Palm Pilot (all models running Palm OS 4.x or earlier) and the Space Shuttle. Although no modern desktop computers are based on processors in the 680x0 series, derivative processors are still widely used in embedded systems. Motorola ceased development of the 680x0 series ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
H8 Family
H8 is the name of a large family of 8-bit, 16-bit and 32-bit microcontrollers made by Renesas Technology, originating in the early 1990s within Hitachi Semiconductor. An administrator on the Renesas user community boards commented in 2011 that there are no plans for further development of H8 based products. The family of largely CISC machines is unrelated to the higher-performance SuperH family of 32-bit RISC-like microcontrollers. It was supported in the Linux kernel starting with version 4.2 but support was removed in version 5.19. Variants Subfamilies include the 8/16-bit H8/300 and H8/500, the 16/32-bit H8/300H and H8S and the 32-bit H8SX series, each with dozens of different variants, varying by speed, selection of built-in peripherals such as timers and serial ports, and amounts of ROM, flash memory and RAM. Built-in ROM and flash memory tends to range from 16 KB to 1024 KB, and RAM from 512 B to 512 KB. The basic architecture of the H8 is patter ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Blackfin
The Blackfin is a family of 16-/32-bit microprocessors developed, manufactured and marketed by Analog Devices. The processors have built-in, fixed-point digital signal processor (DSP) functionality supplied by 16-bit multiply–accumulates (MACs), accompanied on-chip by a microcontroller. It was designed for a unified low-power processor architecture that can run operating systems while simultaneously handling complex numeric tasks such as real-time H.264 video encoding. Architecture details Blackfin processors use a 32-bit RISC microcontroller programming model on a SIMD architecture, which was co-developed by Intel and Analog Devices, as MSA (Micro Signal Architecture). The architecture was announced in December 2000, and first demonstrated at the Embedded Systems Conference in June, 2001. It incorporates aspects of ADI's older SHARC architecture and Intel's XScale architecture into a single core, combining digital signal processing (DSP) and microcontroller func ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
AVR32
AVR32 is a 32-bit RISC microcontroller architecture produced by Atmel. The microcontroller architecture was designed by a handful of people educated at the Norwegian University of Science and Technology, including lead designer Øyvind Strøm and CPU architect Erik Renno in Atmel's Norwegian design center. Most instructions are executed in a single-cycle. The multiply–accumulate unit can perform a 32-bit × 16-bit + 48-bit arithmetic operation in two cycles (result latency), issued once per cycle. It does not resemble the 8-bit AVR microcontroller family, even though they were both designed at Atmel Norway, in Trondheim. Some of the debug-tools are similar. Support for AVR32 has been dropped from Linux as of kernel 4.12; Atmel has switched mostly to M variants of the ARM architecture. Architecture The AVR32 has at least two micro-architectures, the AVR32A and AVR32B. These differ in the instruction set architecture, register configurations and the use of caches for in ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ARM Architecture
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configured for various environments. Arm Ltd. develops the architectures and licenses them to other companies, who design their own products that implement one or more of those architectures, including system on a chip (SoC) and system on module (SOM) designs, that incorporate different components such as memory, interfaces, and radios. It also designs cores that implement these instruction set architectures and licenses these designs to many companies that incorporate those core designs into their own products. There have been several generations of the ARM design. The original ARM1 used a 32-bit internal structure but had a 26-bit address space that limited it to 64 MB of main memory. This limitation was removed in the ARMv3 series, which h ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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