WinChip
The WinChip series was a low-power Socket 7-based x86 processor designed by Centaur Technology and marketed by its parent company IDT. Overview Design The design of the WinChip was quite different from other processors of the time. Instead of a large gate count and die area, IDT, using its experience from the RISC processor market, created a small and electrically efficient processor similar to the 80486, because of its single pipeline and in-order execution microarchitecture. It was of much simpler design than its Socket 7 competitors, such as AMD K5/ K6, which were superscalar and based on ''dynamic'' translation to buffered micro-operations with advanced instruction reordering (out of order execution). Use WinChip was, in general, designed to perform well with popular applications that did few (if any) floating point calculations. This included operating systems of the time and the majority of software used in businesses. It was also designed to be a drop-in replacement fo ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Super Socket 7
Super Socket 7, also referred to as Super 7, is a hardware-level extension of the Socket 7 ZIF socket specification for x86 processors. Compatible motherboards and chipsets use a standard Socket 7 connection for the CPU, while adding certain features including a maximum 100 MHz front-side bus and support for AGP graphics cards. Super Socket 7 was used by AMD K6-2 and K6-III processors, some of the final Cyrix M-II processors, some of the final IDT WinChip 2 processors, and Rise mP6 processors. It is backward compatible with Socket 7 CPUs, meaning a Socket 7 CPU can be used with a Super Socket 7 motherboard, but a Super Socket 7 CPU cannot operate at full speed in a Socket 7 motherboard. Socket 5 CPUs are pin-compatible with Super Socket 7, but not all motherboards designed for Super Socket 7 supported the voltages or bus speeds needed for Socket 5 CPUs. While AMD had previously always used Intel sockets for their processors, Socket 7 was the last one for which AMD retaine ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Cyrix III
Cyrix III is an x86-compatible Socket 370 CPU. VIA Technologies launched the processor in February 2000. VIA had purchased both Centaur Technology and Cyrix. Cyrix III was to be based upon a core from one of the two companies. History The Cyrix III was launched in late February 2000. It was initially based on the Joshua core, and was available in two performance ratings of 500 and 533 MHz, with the PR500 being $84 per unit and the PR533 $99. National Semiconductor would be the producer of the chips. 650 and 677 MHz versions of the Cyrix III were available starting January of 2001. The 650 MHz version would cost $55 per chip while the 677 would be $60 and both were based on the Samuel core. The 700 MHz version of the Cyrix III was available on January 19, 2001. The price would be $62 per chip in bulk quantities. This was the last III chip released using the Samuel core, as the Samuel II was expected to be released in March. Just a month later in February 2001, Cyrix III chips ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Socket 5
Socket 5 was created for the second generation of Intel P5 Pentium processors operating at speeds from 75 to 133 MHz as well as certain Pentium OverDrive and Pentium MMX processors with core voltage 3.3 V. It superseded the earlier Socket 4. It was released in March 1994. Consisting of 320 pins, this was the first socket to use a staggered pin grid array, or SPGA, which allowed the chip's pins to be spaced closer together than earlier sockets. Socket 5 was replaced by Socket 7 in 1995. External linksDifferences between Socket 5 and Socket 7(archived) See also * List of Intel microprocessors * List of AMD microprocessors This article gives a list of AMD microprocessors, sorted by generation and release year. If applicable and openly known, the designation(s) of each processor's core (versions) is (are) listed in parentheses. For an overview over concrete product, y ... References {{earlysock Socket 005 ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Cyrix 6x86
The Cyrix 6x86 is a line of sixth-generation, 32-bit x86 microprocessors designed and released by Cyrix in 1995. Cyrix, being a fabless company, had the chips manufactured by IBM and SGS-Thomson. The 6x86 was made as a direct competitor to Intel's Pentium microprocessor line, and was pin compatible. During the 6x86's development, the majority of applications (office software as well as games) performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget. This would later prove to be a strategic mistake, as the popularity of the P5 Pentium caused many software developers to hand-optimize code in assembly language, to take advantage of the P5 Pentium's tightly pipelined and lower latency FPU. For example, the highly anticip ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Centaur Technology
Centaur Technology is an x86 CPU design company started in 1995 and subsequently a wholly owned subsidiary of VIA Technologies. In 2015, the documentary ''Rise of the Centaur'' covered the early history of the company. History Centaur Technologies Inc. was founded in April 1995 by Glenn Henry, Terry Parks, Darius Gaskins, and Al Sato. The funding came from Integrated Device Technology, Inc (IDT). The business goal was to develop compatible x86 processors that were much less expensive than Intel processors and consumed much less power. There were two fundamental elements of the plan. First, a unique design, developed from scratch, of an x86 processor core optimized differently from Intel's cores. Second, a unique management approach designed to achieve high productivity. While funded by IDT, three different Centaur designs were shipped under the marketing name of WinChip. In September 1999, Centaur was purchased from IDT by VIA Technologies, a Taiwanese company. Since then, fiv ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Socket 7
Socket 7 is a physical and electrical specification for an x86-style CPU socket on a personal computer motherboard. It was released in June 1995. The socket supersedes the earlier Socket 5, and accepts P5 Pentium microprocessors manufactured by Intel, as well as compatibles made by Cyrix/ IBM, AMD, IDT and others. Socket 7 was the only socket that supported a wide range of CPUs from different manufacturers and a wide range of speeds. Differences between Socket 5 and Socket 7 are that Socket 7 has an extra pin and is designed to provide dual split rail voltage, as opposed to Socket 5's single voltage. However, not all motherboard manufacturers supported the dual voltage on their boards initially. Socket 7 is backwards compatible; a Socket 5 CPU can be inserted and used on a Socket 7 motherboard. Processors that used Socket 7 are the AMD K5 and K6, the Cyrix 6x86 and 6x86MX, the IDT WinChip, the Intel P5 Pentium (2.5–3.5 V, 75–200 MHz), the Pentium MMX (166–23 ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Pentium MMX
The Pentium (also referred to as P5, its microarchitecture, or i586) is a fifth generation, 32-bit x86 microprocessor that was introduced by Intel on March 22, 1993, as the very first CPU in the Pentium brand. It was instruction set compatible with the 80486 but was a new and very different microarchitecture design from previous iterations. The P5 Pentium was the first superscalar x86 microarchitecture and the world's first superscalar microprocessor to be in mass productionmeaning it generally executes at least 2 instructions per clock mainly because of a design-first dual integer pipeline design previously thought impossible to implement on a CISC microarchitecture. Additional features include a faster floating-point unit, wider data bus, separate code and data caches, and many other techniques and features to enhance performance and support security, encryption, and multiprocessing, for workstations and servers when compared to the next best previous industry standard process ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Intel P5
The Pentium (also referred to as P5, its microarchitecture, or i586) is a fifth generation, 32-bit x86 microprocessor that was introduced by Intel on March 22, 1993, as the very first CPU in the Pentium brand. It was instruction set compatible with the 80486 but was a new and very different microarchitecture design from previous iterations. The P5 Pentium was the first superscalar x86 microarchitecture and the world's first superscalar microprocessor to be in mass productionmeaning it generally executes at least 2 instructions per clock mainly because of a design-first dual integer pipeline design previously thought impossible to implement on a CISC microarchitecture. Additional features include a faster floating-point unit, wider data bus, separate code and data caches, and many other techniques and features to enhance performance and support security, encryption, and multiprocessing, for workstations and servers when compared to the next best previous industry standard proces ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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IA-32
IA-32 (short for "Intel Architecture, 32-bit", commonly called i386) is the 32-bit version of the x86 instruction set architecture, designed by Intel and first implemented in the 80386 microprocessor in 1985. IA-32 is the first incarnation of x86 that supports 32-bit computing; as a result, the "IA-32" term may be used as a metonym to refer to all x86 versions that support 32-bit computing. Within various programming language directives, IA-32 is still sometimes referred to as the "i386" architecture. In some other contexts, certain iterations of the IA-32 ISA are sometimes labelled i486, i586 and i686, referring to the instruction supersets offered by the 80486, the P5 and the P6 microarchitectures respectively. These updates offered numerous additions alongside the base IA-32 set including floating-point capabilities and the MMX extensions. Intel was historically the largest manufacturer of IA-32 processors, with the second biggest supplier having been AMD. During the 1 ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Superscalar
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a superscalar processor can execute more than one instruction during a clock cycle by simultaneously dispatching multiple instructions to different execution units on the processor. It therefore allows more throughput (the number of instructions that can be executed in a unit of time) than would otherwise be possible at a given clock rate. Each execution unit is not a separate processor (or a core if the processor is a multi-core processor), but an execution resource within a single CPU such as an arithmetic logic unit. In Flynn's taxonomy, a single-core superscalar processor is classified as an SISD processor (single instruction stream, single data stream), though a single-core superscalar processor that supports short vector operations could ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Micro-operation
In computer central processing units, micro-operations (also known as micro-ops or μops, historically also as micro-actions) are detailed low-level instructions used in some designs to implement complex machine instructions (sometimes termed macro-instructions in this context). Usually, micro-operations perform basic operations on data stored in one or more registers, including transferring data between registers or between registers and external buses of the central processing unit (CPU), and performing arithmetic or logical operations on registers. In a typical fetch-decode-execute cycle, each step of a macro-instruction is decomposed during its execution so the CPU determines and steps through a series of micro-operations. The execution of micro-operations is performed under control of the CPU's control unit, which decides on their execution while performing various optimizations such as reordering, fusion and caching. Optimizations Various forms of μops have long bee ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Operating System
An operating system (OS) is system software that manages computer hardware, software resources, and provides common services for computer programs. Time-sharing operating systems schedule tasks for efficient use of the system and may also include accounting software for cost allocation of processor time, mass storage, printing, and other resources. For hardware functions such as input and output and memory allocation, the operating system acts as an intermediary between programs and the computer hardware, although the application code is usually executed directly by the hardware and frequently makes system calls to an OS function or is interrupted by it. Operating systems are found on many devices that contain a computer from cellular phones and video game consoles to web servers and supercomputers. The dominant general-purpose personal computer operating system is Microsoft Windows with a market share of around 74.99%. macOS by Apple Inc. is in second place (14.84%), and ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |