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User Electronic Signature
The User Electronic Signature (UES) is a bitfield with user-defined content in a programmable logic device (PLD). It is usually used for the storage of the ID and/or version number of the PLD, suited for Serial communication, serial identification. Examples for PLD's with a UES are the industry standards GAL16V8 and GAL22V10. The size of the UES is device-dependent. References Bit data structures {{electronics-stub ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Bitfield
A bit field is a data structure that consists of one or more adjacent bits which have been allocated for specific purposes, so that any single bit or group of bits within the structure can be set or inspected. A bit field is most commonly used to represent integral types of known, fixed bit-width, such as single-bit Booleans. The meaning of the individual bits within the field is determined by the programmer; for example, the first bit in a bit field (located at the field's base address) is sometimes used to determine the state of a particular attribute associated with the bit field. Within CPUs and other logic devices, collections of bit fields called flags are commonly used to control or to indicate the outcome of particular operations. Processors have a status register that is composed of flags. For example if the result of an addition cannot be represented in the destination an arithmetic overflow is set. The flags can be used to decide subsequent operations, such as condit ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Programmable Logic Device
A programmable logic device (PLD) is an electronic component used to build reconfigurable digital circuits. Unlike digital logic constructed using discrete logic gates with fixed functions, a PLD has an undefined function at the time of manufacture. Before the PLD can be used in a circuit it must be programmed to implement the desired function. Compared to fixed logic devices, programmable logic devices simplify the design of complex logic and may offer superior performance. Unlike for microprocessors, programming a PLD changes the connections made between the gates in the device. PLDs can broadly be categorised into, in increasing order of complexity, Simple Programmable Logic Devices (SPLDs), comprising programmable array logic, programmable logic array and generic array logic; Complex Programmable Logic Devices (CPLDs) and Field-Programmable Gate Arrays (FPGAs). History In 1969, Motorola offered the XC157, a mask-programmed gate array with 12 gates and 30 uncommitted ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Serial Communication
In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels. Serial communication is used for all long-haul communication and most computer networks, where the cost of cable and synchronization difficulties make parallel communication impractical. Serial computer buses are becoming more common even at shorter distances, as improved signal integrity and transmission speeds in newer serial technologies have begun to outweigh the parallel bus's advantage of simplicity (no need for serializer and deserializer, or SerDes) and to outstrip its disadvantages (clock skew, interconnect density). The migration from PCI to PCI Express is an example. Cables Many serial communication systems were originally designed to transfer data over relatively ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
GAL22V10
The GAL22V10 is a series of programmable-logic devices from Lattice Semiconductor, implemented as CMOS-based generic array logic ICs, and available in dual inline packages or plastic leaded chip carriers. It is an example of a standard production GAL device that is often used in educational settings as a basic programmable-logic device. Specifications The GAL22V10 has 12 input pins, and 10 pins that can be configured as either inputs or outputs, and exists in various switching speeds, from 25 to 4 ns. Each output is driven by an output-logic macrocell (OLMC), with an output-enable product term, and a variable number of product terms, ranging from eight to sixteen. Each OLMC may be set to output as inverting or non-inverting, and be placed into either registered or combinatorial mode. In registered mode, each macrocell actively uses a D-flip-flop to hold a state under control of the data input from the logic portion of the macrocell and the rising edge of the clock signal, whi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
