TurboSPARC
   HOME
*





TurboSPARC
The TurboSPARC is a microprocessor that implements the SPARC V8 instruction set architecture (ISA) developed by Fujitsu Microelectronics, Inc. (FMI), the United States subsidiary of the Japanese multinational information technology equipment and services company Fujitsu Limited located in San Jose, California. It was a low-end microprocessor primarily developed as an upgrade for the Sun Microsystems microSPARC-II-based SPARCstation 5 workstation. It was introduced on 30 September 1996, with a 170 MHz version priced at US$499 in quantities of 1,000. Fujitsu Microelectronics, Inc., ''Fujitsu Microelectronics' New TurboSPARC Processor Sets New Performance Level For Low-End, Mid-Range Workstations''. The TurboSPARC was mostly succeeded in the low-end SPARC market by the UltraSPARC IIi in late 1997, but remained available. Users of the TurboSPARC were Force Computers, Fujitsu, RDI Computer, Opus Systems, Tadpole Technologies, Tatung Science and Technology and Themis Computers. Fuj ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

SPARCstation 5
SPARCstation 5 or SS5 (code-named ''Aurora'') is a workstation introduced by Sun Microsystems in March 1994. It is based on the sun4m architecture, and is enclosed in a pizza box form factor, pizza-box chassis. Sun also offered a SPARCserver 5 without a framebuffer. A simplified, cheaper version of the SS5 was released in February 1995 as the SPARCstation 4. Sun also marketed these same machines under the "Netra" brand, without framebuffers or keyboards and preconfigured with all the requisite software to be used as web servers. An estimated 400,000+ SPARCstation 5s were sold. Specifications Release Price Sun rolled out the SPARCstation 5 for . CPU support The SPARCstation 5 may incorporate one of the following processors: 70, 85, or 110 MHz Sun Microsystems microSPARC-II, or a 170 MHz Fujitsu Microelectronics, Inc. (FMI) TurboSPARC. Fujitsu also provided a 160 MHz TurboSPARC CPU Upgrade Kit for upgrading 70, 85 and 110 MHz microSPARC-II models. The SPARCstati ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

SPARC
SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed in the early 1980s. First developed in 1986 and released in 1987, SPARC was one of the most successful early commercial RISC systems, and its success led to the introduction of similar RISC designs from many vendors through the 1980s and 1990s. The first implementation of the original 32-bit architecture (SPARC V7) was used in Sun's Sun-4 computer workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 series of processors. SPARC V8 added a number of improvements that were part of the SuperSPARC series of processors released in 1992. SPARC V9, released in 1993, introduced a 64-bit architecture and was first released in Sun's UltraSPARC processors in 1995. Later, SPARC processors were used in symm ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


SPARC Microprocessors
SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed in the early 1980s. First developed in 1986 and released in 1987, SPARC was one of the most successful early commercial RISC systems, and its success led to the introduction of similar RISC designs from many vendors through the 1980s and 1990s. The first implementation of the original 32-bit architecture (SPARC V7) was used in Sun's Sun-4 computer workstation and server systems, replacing their earlier Sun-3 systems based on the Motorola 68000 series of processors. SPARC V8 added a number of improvements that were part of the SuperSPARC series of processors released in 1992. SPARC V9, released in 1993, introduced a 64-bit architecture and was first released in Sun's UltraSPARC processors in 1995. Later, SPARC processors were used in sym ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

Fujitsu Limited
is a Japanese multinational information and communications technology equipment and services corporation, established in 1935 and headquartered in Tokyo. Fujitsu is the world's sixth-largest IT services provider by annual revenue, and the largest in Japan, in 2021. The hardware offerings from Fujitsu are mainly of personal and enterprise computing products, including x86, SPARC and mainframe compatible server products, although the corporation and its subsidiaries also offer a diversity of products and services in the areas of data storage, telecommunications, advanced microelectronics, and air conditioning. It has approximately 126,400 employees and its products and services are available in approximately 180 countries. Fujitsu is listed on the Tokyo Stock Exchange and Nagoya Stock Exchange; its Tokyo listing is a constituent of the Nikkei 225 and TOPIX 100 indices. History 1935 to 2000 Fujitsu was established on June 20, 1935, which makes it one of the oldest operating I ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

Fast Page Mode
Dynamic random-access memory (dynamic RAM or DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell, usually consisting of a tiny capacitor and a transistor, both typically based on metal-oxide-semiconductor (MOS) technology. While most DRAM memory cell designs use a capacitor and transistor, some only use two transistors. In the designs where a capacitor is used, the capacitor can either be charged or discharged; these two states are taken to represent the two values of a bit, conventionally called 0 and 1. The electric charge on the capacitors gradually leaks away; without intervention the data on the capacitor would soon be lost. To prevent this, DRAM requires an external ''memory refresh'' circuit which periodically rewrites the data in the capacitors, restoring them to their original charge. This refresh process is the defining characteristic of dynamic random-access memory, in contrast to static random-access memory (SRAM ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

Fujitsu Microprocessors
is a Japanese multinational information and communications technology equipment and services corporation, established in 1935 and headquartered in Tokyo. Fujitsu is the world's sixth-largest IT services provider by annual revenue, and the largest in Japan, in 2021. The hardware offerings from Fujitsu are mainly of personal and enterprise computing products, including x86, SPARC and mainframe compatible server products, although the corporation and its subsidiaries also offer a diversity of products and services in the areas of data storage, telecommunications, advanced microelectronics, and air conditioning. It has approximately 126,400 employees and its products and services are available in approximately 180 countries. Fujitsu is listed on the Tokyo Stock Exchange and Nagoya Stock Exchange; its Tokyo listing is a constituent of the Nikkei 225 and TOPIX 100 indices. History 1935 to 2000 Fujitsu was established on June 20, 1935, which makes it one of the oldest operating I ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


Microprocessor Report
''Microprocessor Report'' is a newsletter covering the microprocessor industry. The publication is accessible only to paying subscribers. To avoid bias, it does not take advertisements. The publication provides extensive analysis of new high-performance microprocessor chips. It also covers microprocessor design issues, microprocessor-based systems, memory and system logic chips, embedded processors, GPUs, DSPs, and intellectual property (IP) cores. History and profile ''Microprocessor Report'' was first published in 1987 by Michael Slater. Original board members included Bruce Koball, George Morrow, and J H Wharton all of whom served for many years. Originally published monthly in print, since 2000 it has been published weekly online and monthly in print. Slater left MicroDesign Resources (MDR), at the end of 1999. Typical articles describe the internal design and feature set of microprocessors from vendors such as Intel, Broadcom, and Qualcomm. The articles usually compare the ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

Press Release
A press release is an official statement delivered to members of the news media for the purpose of providing information, creating an official statement, or making an announcement directed for public release. Press releases are also considered a primary source, meaning they are original informants for information. A press release is traditionally composed of nine structural elements, including a headline, dateline, introduction, body, and other components. Press releases are typically delivered to news media electronically, ready to use, and often subject to "do not use before" time, known as a news embargo. A special example of a press release is a communiqué (), which is a brief report or statement released by a public agency. A communiqué is typically issued after a high-level meeting of international leaders. Using press release material can benefit media corporations because they help decrease costs and improve the amount of material a media firm can output in a cer ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

Ball Grid Array
A ball grid array (BGA) is a type of surface-mount packaging (a chip carrier) used for integrated circuits. BGA packages are used to permanently mount devices such as microprocessors. A BGA can provide more interconnection pins than can be put on a dual in-line or flat package. The whole bottom surface of the device can be used, instead of just the perimeter. The traces connecting the package's leads to the wires or balls which connect the die to package are also on average shorter than with a perimeter-only type, leading to better performance at high speeds. BGAs were introduced in the 1990s and became popular by 2001. Soldering of BGA devices requires precise control and is usually done by automated processes such as in computer-controlled automatic reflow ovens. Description The BGA is descended from the pin grid array (PGA), which is a package with one face covered (or partly covered) with pins in a grid pattern which, in operation, conduct electrical signals betwe ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  


picture info

Complementary Metal–oxide–semiconductor
Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", ) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFETs for logic functions. CMOS technology is used for constructing integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS), and other digital logic circuits. CMOS technology is also used for analog circuits such as image sensors (CMOS sensors), data converters, RF circuits (RF CMOS), and highly integrated transceivers for many types of communication. The CMOS process was originally conceived by Frank Wanlass at Fairchild Semiconductor and presented by Wanlass and Chih-Tang Sah at the International Solid-State Circuits Conference in 1963. Wanlass later filed US patent 3,356,858 for CMOS circuitry and it was granted in 1967. commercialized the technology with the trademark "COS-MOS" ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]  




SBus
SBus is a computer bus system that was used in most SPARC-based computers (including all SPARCstations) from Sun Microsystems and others during the 1990s. It was introduced by Sun in 1989 to be a high-speed bus counterpart to their high-speed SPARC processors, replacing the earlier (and by this time, outdated) VMEbus used in their Motorola 68020- and 68030-based systems and early SPARC boxes. When Sun moved to open the SPARC definition in the early 1990s, SBus was likewise standardized and became IEEE-1496. In 1997 Sun started to migrate away from SBus to the Peripheral Component Interconnect (PCI) bus, and today SBus is no longer used. The industry's first third-party SBus cards were announced in 1989 by Antares Microsystems; these were a 10BASE2 Ethernet controller, a SCSI-SNS host adapter, a parallel port, and an 8-channel serial controller. The specification was published by Edward H. Frank and James D. Lyle. A technical guide to the bus was published in 1992 in book form b ...
[...More Info...]      
[...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]