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Tseng Labs ET4000
The Tseng Labs ''ET4000'' was a line of SVGA graphics controller chips during the early 1990s, commonly found in many 386/ 486 and compatible systems, with some models, notably the ''ET4000/W32'' and later chips, offering graphics acceleration. Offering above average host interface throughput coupled with a moderate price, Tseng Labs' ''ET4000'' chipset family were well regarded for their performance, and were integrated into many companies' lineups, notably with Hercules' ''Dynamite'' series, the Diamond ''Stealth 32'' and several ''Speedstar'' cards, and on many generic boards. Models ET4000AX The ''ET4000AX'' was a major advancement over Tseng Labs' earlier ''ET3000'' SVGA chipset, featuring a new 16-bit host interface controller with deep FIFO buffering and caching capabilities, and an enhanced, variable-width memory interface with support for up to 1MB of memory with a ~16-bit VRAM or ~32-bit DRAM memory data bus width. The FIFO buffers and cache functions had the effect ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Industry Standard Architecture
Industry Standard Architecture (ISA) is the 16-bit internal bus of IBM PC/AT and similar computers based on the Intel 80286 and its immediate successors during the 1980s. The bus was (largely) backward compatible with the 8-bit bus of the 8088-based IBM PC, including the IBM PC/XT as well as IBM PC compatibles. Originally referred to as the PC bus (8-bit) or AT bus (16-bit), it was also termed ''I/O Channel'' by IBM. The ISA term was coined as a retronym by competing PC-clone manufacturers in the late 1980s or early 1990s as a reaction to IBM attempts to replace the AT-bus with its new and incompatible Micro Channel architecture. The 16-bit ISA bus was also used with 32-bit processors for several years. An attempt to extend it to 32 bits, called Extended Industry Standard Architecture (EISA), was not very successful, however. Later buses such as VESA Local Bus and PCI were used instead, often along with ISA slots on the same mainboard. Derivatives of the AT bus structure ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
S3 Graphics
S3 Graphics, Ltd (commonly referred to as S3) was an American computer graphics company. The company sold the Trio, ViRGE, Savage 3D, and Chrome series of graphics processors. Struggling against competition from 3dfx Interactive, ATI and Nvidia, it merged with hardware manufacturer Diamond Multimedia in 1999. The resulting company renamed itself to SONICblue Incorporated, and, two years later, the graphics portion was spun off into a new joint effort with VIA Technologies. The new company focused on the mobile graphics market. VIA Technologies' stake in S3 Graphics was purchased by HTC in 2011. History S3 was founded and incorporated in January 1989 by Dado Banatao and Ronald Yara. It was named S3 as it was Banatao's third startup company. The company's first products were among the earliest graphical user interface (GUI) accelerators. These chips were popular with video card manufacturers, and their followup designs, including the Trio64, made strong inroads with OEMs. S ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Peripheral Component Interconnect
Peripheral Component Interconnect (PCI) is a local computer bus for attaching hardware devices in a computer and is part of the PCI Local Bus standard. The PCI bus supports the functions found on a processor bus but in a standardized format that is independent of any given processor's native bus. Devices connected to the PCI bus appear to a bus master to be connected directly to its own bus and are assigned addresses in the processor's address space. It is a parallel bus, synchronous to a single bus clock. Attached devices can take either the form of an integrated circuit fitted onto the motherboard (called a ''planar device'' in the PCI specification) or an expansion card that fits into a slot. The PCI Local Bus was first implemented in IBM PC compatibles, where it displaced the combination of several slow Industry Standard Architecture (ISA) slots and one fast VESA Local Bus (VLB) slot as the bus configuration. It has subsequently been adopted for other computer types. Typic ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Sprite (computer Graphics)
Sprite commonly refers to: * Sprite (drink), a lemon-lime beverage produced by the Coca-Cola Company * Sprite (computer graphics), a smaller bitmap composited onto another by hardware or software * Sprite (folklore), a type of legendary creature including elves, fairies, and pixies Sprite may also refer to: Comics *Sprite (Eternal), a fictional member of the race of Eternals in the Marvel Universe * ''Sprite'' (manga), a 2009 Japanese manga series *Sprite, alias of the Marvel Comics character Kitty Pryde *Sprite comic, a webcomic that consists primarily of computer sprites from video games Computing and technology * Sprite (operating system), an operating system developed at the University of California, Berkeley * SPRITE (spacecraft), a proposed Saturn atmospheric probe mission * SPRITE infrared detector, a specialist detector device using a process known as signal processing in the element * De Havilland Sprite, a British rocket engine Vehicles * Sprite (motorcycle), a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Bit Blit
Bit blit (also written BITBLT, BIT BLT, BitBLT, Bit BLT, Bit Blt etc., which stands for ''bit block transfer'') is a data operation commonly used in computer graphics in which several bitmaps are combined into one using a ''boolean function''. The operation involves at least two bitmaps: a "source" (or "foreground") and a "destination" (or "background"), and possibly a third that is often called the "mask". The result may be written to a fourth bitmap, though often it replaces the destination. The pixels of each are combined bitwise according to the specified raster operation (ROP) and the result is then written to the destination. The ROP is essentially a boolean formula. The most obvious ROP overwrites the destination with the source. Other ROPs may involve AND, OR, XOR, and NOT operations. The Commodore Amiga's graphics chipset (and others) could combine three source bitmaps using any of the 256 possible boolean functions with three inputs. Modern graphics software has almost ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Hardware Acceleration
Hardware acceleration is the use of computer hardware designed to perform specific functions more efficiently when compared to software running on a general-purpose central processing unit (CPU). Any transformation of data that can be calculated in software running on a generic CPU can also be calculated in custom-made hardware, or in some mix of both. To perform computing tasks more quickly (or better in some other way), generally one can invest time and money in improving the software, improving the hardware, or both. There are various approaches with advantages and disadvantages in terms of decreased latency, increased throughput and reduced energy consumption. Typical advantages of focusing on software may include more rapid development, lower non-recurring engineering costs, heightened portability, and ease of updating features or patching bugs, at the cost of overhead to compute general operations. Advantages of focusing on hardware may include speedup, reduced pow ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
RAMDAC
A random-access memory digital-to-analog converter (RAMDAC) is a combination of three fast digital-to-analog converters (DACs) with a small static random-access memory (SRAM) used in computer graphics display controllers or video cards to store the color palette and to generate the analog signals (usually a voltage amplitude) to drive a color monitor. The logical color number from the display memory is fed into the address inputs of the SRAM to select a palette entry to appear on the data output of the SRAM. This entry is composed of three separate values corresponding to the three components (red, green, and blue) of the desired physical color. Each component value is fed to a separate DAC, whose analog output goes to the monitor, and ultimately to one of its three electron guns (or equivalent in non- CRT displays). RAMDACs became obsolete as DVI, HDMI, DisplayPort and other digital interface technology became mainstream, which transfer video data digitally (via transition-minim ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
VESA Local Bus
The VESA Local Bus (usually abbreviated to VL-Bus or VLB) is a short-lived expansion bus introduced during the i486 generation of x86 IBM-compatible personal computers. Created by VESA (Video Electronics Standards Association), the VESA Local Bus worked alongside the then-dominant ISA bus to provide a standardized high-speed conduit intended primarily to accelerate video (graphics) operations. VLB provides a standardized fast path that add-in (video) card makers could tap for greatly accelerated memory-mapped I/O and DMA, while still using the familiar ISA bus to handle basic device duties such as interrupts and port-mapped I/O. Some high-end 386dx motherboards also had a VL-Bus slot. Historical overview In the early 1990s, the I/O bandwidth of the prevailing ISA bus, 8.33 MB/s for standard 16 bit 8.33 MHz slots, had become a critical bottleneck to PC video and graphics performance. The need for faster graphics was driven by increased adoption of graphical user interfac ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Micro Channel Architecture
Micro Channel architecture, or the Micro Channel bus, is a proprietary 16- or 32-bit parallel computer bus introduced by IBM in 1987 which was used on PS/2 and other computers until the mid-1990s. Its name is commonly abbreviated as "MCA", although not by IBM. In IBM products, it superseded the ISA bus and was itself subsequently superseded by the PCI bus architecture. Background The development of Micro Channel was driven by both technical and business pressures. Technology The IBM AT bus, which later became known as the Industry Standard Architecture (ISA) bus, had a number of technical design limitations, including: * A slow bus speed. * A limited number of interrupts, fixed in hardware. * A limited number of I/O device addresses, also fixed in hardware. * Hardwired and complex configuration with no conflict resolution. * Deep links to the architecture of the 80x86 chip familyUse of the ISA bus outside of machines employing the 80x86 CPU family was rare. Notable non- ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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