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Test Register
A test register, in the Intel 80386 and Intel 80486 processor, was a register used by the processor, usually to do a self-test. Most of these registers were undocumented, and used by specialized software. The test registers were named TR3 to TR7. Regular programs don't usually require these registers to work. With the P5 (microarchitecture), Pentium, the test registers were replaced by a variety of model-specific registers (MSRs). In the 80386, two test registers, TR6 and TR7, were provided for the purpose of Translation_lookaside_buffer, TLB testing. TR6 was the test command register, and TR7 was the test data register. The 80486 provided three additional registers, TR3, TR4 and TR5, for testing of the L1 cache. TR3 was a data register, TR4 was an address register and TR5 was a command register. These registers were accessed by variants of the MOV (x86 instruction), MOV instruction. A test register may either be the source operand or the destination operand. The MOV instructions a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel 80386
The Intel 386, originally released as the 80386 and later renamed i386, is the third-generation x86 architecture microprocessor from Intel. It was the first 32-bit computing, 32-bit processor in the line, making it a significant evolution in the x86 architecture. Pre-production samples of the 386 were released to select developers in 1985, while mass production commenced in 1986. The 386 was the central processing unit, central processing unit (CPU) of many workstations and high-end personal computers of the time. The 386 began to fall out of public use starting with the release of the i486 processor in 1989, while in embedded systems the 386 remained in widespread use until Intel finally discontinued it in 2007. Compared to its predecessor the Intel 80286 ("286"), the 80386 added a three-stage instruction pipelining, instruction pipeline which it brings up to total of 6-stage instruction pipeline, extended the architecture from 16-bits to 32-bits, and added an on-chip memory ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Cyrix
Cyrix Corporation was a microprocessor developer that was founded in 1988 in Richardson, Texas, as a specialist supplier of floating point units for 286 and 386 microprocessors. The company was founded by Tom Brightman and Jerry Rogers. Terry Rogers was also serving as the company Chief Executive Officer and president up until December 9, 1996, when he stepped down from this role, but remained on the Board of Directors. In 1992, Cyrix introduced its own i386 compatible processors, the 486SLC and 486DLC. These had higher performance than the Intel parts, but a lower price. They were primarily marketed to users looking to upgrade existing machines. Their release sparked a lengthy series of lawsuits with Intel while their foundry partner IBM was releasing the same designs under their own branding. The combination of these events led Cyrix to begin losing money, and the company merged with National Semiconductor on 11 November 1997. National released Cyrix's latest designs ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
X86 Debug Register
On the x86 architecture, a debug register is a register used by a processor for program debugging. There are six debug registers, named DR0...DR7, with DR4 and DR5 as obsolete synonyms for DR6 and DR7. The debug registers allow programmers to selectively enable various debug conditions associated with a set of four debug addresses. Two of these registers are used to control debug features. These registers are accessed by variants of the MOV instruction. A debug register may be either the source operand or destination operand. The debug registers are privileged resources; the MOV instructions that access them can only be executed at privilege level zero. An attempt to read or write the debug registers when executing at any other privilege level causes a general protection fault. DR0 to DR3 Each of these registers contains the linear address associated with one of four breakpoint conditions. Each breakpoint condition is further defined by bits in DR7. The debug address registers ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Control Register
A control register is a processor register that changes or controls the general behavior of a CPU or other digital device. Common tasks performed by control registers include interrupt control, switching the addressing mode, paging control, and coprocessor control. History The early CPU lacked dedicated control registers, and relied on a limited set of internal signals and flags. When IBM developed a paging version of the System/360, they added 16 control registers to the design for what became the 360/67. IBM did not provide control registers on other S/360 models, but made them a standard part of System/370, although with different register and bit assignments. As IBM added new features to the architecture, e.g., DAS, S/370-XA, S/370-ESA, ESA/390, they added additional fields to the control registers. With z/Architecture, IBM doubled the control register size to 64 bits. Control registers in IBM 360/67 On the 360/67, CR0 and CR2 are used by address translation, CR 4- ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Quark
Intel Quark is a line of 32-bit x86 SoCs and microcontrollers by Intel, designed for small size and low power consumption, and targeted at new markets including wearable devices. The line was introduced at Intel Developer Forum in 2013, and discontinued in January 2019. Quark processors, while slower than Atom processors, are much smaller and consume less power. They lack support for SIMD instruction sets (such as MMX and SSE) and only support embedded operating systems. Quark powers the (now discontinued) Intel Galileo developer microcontroller board. In 2016 Arduino released the Arduino 101 board that includes an Intel Quark SoC. The CPU instruction set is, for most models, the same as a Pentium ( P54C/i586) CPU. History The first product in the Quark line is the single-core 32 nm X1000 SoC with a clock rate of up to 400 MHz. The system includes several interfaces, including PCI Express, serial UART, I²C, Fast Ethernet, USB 2.0, SDIO, power management ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
WinChip
The WinChip series is a discontinued CPU electrical consumption, low-power Socket 7-based x86 central processing unit, processor that was designed by Centaur Technology and marketed by its parent company Integrated Device Technology, IDT. Overview Design The design of the WinChip was quite different from other processors of the time. Instead of a large gate count and die (integrated circuit), die area, IDT, using its experience from the RISC processor market, created a small and electrically efficient processor similar to the Intel 80486, 80486, because of its single Pipeline (computing), pipeline and Out of Order execution#In-order processors, in-order execution microarchitecture. It was of much simpler design than its Socket 7 competitors, such as AMD K5/AMD K6, K6, which were superscalar and based on dynamic translation to buffered micro-operations with advanced instruction reordering (Out of Order execution, out of order execution). Use WinChip was, in general, designed to per ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Geode (processor)
Geode is a series of x86-compatible system-on-a-chip (SoC) microprocessors and I/O companions produced by AMD that was targeted at the Embedded system, embedded computing market. The series was originally launched by National Semiconductor as the Geode family in 1999. The original Geode processor core itself is derived from the Cyrix MediaGX platform, which was acquired in National's merger with Cyrix in 1997. AMD bought the Geode business from National in August 2003 to augment its existing line of embedded x86 processor products. Before acquiring Geode, AMD marketed the AMD Élan, a family of 32-Bit embedded SoCs based on their own Am386, Am486 and Am586 microprocessors. All of these products have been backed with a long-term supply guarantee to meet the needs of embedded processors. However, after acquiring Geode, the product was suddenly discontinued. AMD expanded the Geode series to two classes of processor: the MediaGX-derived Geode GX and LX, and the modern Athlon-derived ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
National Semiconductor
National Semiconductor Corporation was an United States of America, American Semiconductor manufacturing, semiconductor manufacturer, which specialized in analogue electronics, analog devices and subsystems, formerly headquartered in Santa Clara, California, Santa Clara, California. The company produced power management integrated circuits, display drivers, Audio amplifier, audio and operational amplifiers, communication interface products and data conversion solutions. National's key markets included wireless handsets, displays and a variety of broad electronics markets, including medical, automotive, industrial and test and measurement applications. On September 23, 2011, the company formally became part of Texas Instruments as the "Silicon Valley" division. History Founding National Semiconductor was founded in Danbury, Connecticut, by Dr. Bernard J. Rothlein on May 27, 1959, when he and seven colleagues, Edward N. Clarke, Joseph J. Gruber, Milton Schneider, Robert L. Hopkins, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MediaGX
The MediaGX CPU is an x86-compatible processor that was designed by Cyrix and manufactured by National Semiconductor following the two companies' merger. It was introduced in 1997. The core is based on the integration of the Cyrix Cx5x86 CPU core with hardware to process video and audio output (XpressRAM, XpressGRAPHICS, XpressAUDIO). Following the buyout of Cyrix by National Semiconductor and the sale of the Cyrix name and trademarks to VIA Technologies, the core was developed by National Semiconductor into the Geode line of processors, which was subsequently sold to Advanced Micro Devices. Whether this processor belongs in the fourth or fifth generation of x86 processors can be considered a matter of debate as the processor was based on the 5x86 (a scaled down version of the Cyrix 6x86). While the 5x86 was intended to compete with the Intel Pentium line, the 5th generation x86, it was designed to interface with a 4th generation ( 80486) motherboard and had only the 486's ins ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Cyrix III
Cyrix III is an x86-compatible Socket 370 CPU. VIA Technologies launched the processor in February 2000. VIA had purchased both Centaur Technology and Cyrix. Cyrix III was to be based upon a core from one of the two companies. History The Cyrix III was launched in late February 2000. It was initially based on the Joshua core, and was available in two performance ratings of 500 and 533 MHz, with the PR500 being $84 per unit and the PR533 $99. National Semiconductor would be the producer of the chips. 650 and 677 MHz versions of the Cyrix III were available starting January 2001. The 650 MHz version would cost $55 per chip while the 677 would be $60 and both were based on the Samuel core. The 700 MHz version of the Cyrix III was available on January 19, 2001. The price would be $62 per chip in bulk quantities. This was the last III chip released using the Samuel core, as the Samuel II was expected to be released in March. Just a month later in February 2001, Cyrix III chips ba ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Scratchpad Memory
Scratchpad memory (SPM), also known as scratchpad, scratchpad RAM or local store in computer terminology, is an internal memory, usually high-speed, used for temporary storage of calculations, data, and other work in progress. In reference to a microprocessor (or CPU), scratchpad refers to a special high-speed memory used to hold small items of data for rapid retrieval. It is similar to the usage and size of a scratchpad in life: a pad of paper for preliminary notes or sketches or writings, etc. When the scratchpad is a hidden portion of the main memory then it is sometimes referred to as ''bump storage''. In some systems it can be considered similar to the L1 cache in that it is the next closest memory to the ALU after the processor registers, with explicit instructions to move data to and from main memory, often using DMA-based data transfer. In contrast to a system that uses caches, a system with scratchpads is a system with non-uniform memory access (NUMA) latencies, be ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Cyrix 6x86
The Cyrix 6x86 is a line of sixth-generation, 32-bit x86 microprocessors designed and released by Cyrix in 1995. Cyrix, being a fabless company, had the chips manufactured by IBM and SGS-Thomson. The 6x86 was made as a direct competitor to Intel's Pentium microprocessor line, and was pin compatible. During the 6x86's development, the majority of applications ( office software as well as games) performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget. This would later prove to be a strategic mistake, as the popularity of the P5 Pentium caused many software developers to hand-optimize code in assembly language, to take advantage of the P5 Pentium's tightly pipelined and lower latency FPU. For example, the highly anti ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
