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List Of Cache Coherency Protocols
Examples of coherency protocols for cache memory are listed here. For simplicity, all "miss" Read and Write status transactions which obviously come from state "I" (or miss of Tag), in the diagrams are not shown. They are shown directly on the new state. Many of the following protocols have only historical value. At the moment the main protocols used are the R-MESI type / MESIF protocols and the HRT-ST-MESI (MOESI type) or a subset or an extension of these. Cache coherency problem In systems as Multiprocessor system architecture#Symmetric multiprocessor system, Multiprocessor system, Multi-core processor, multi-core and Non-uniform memory access, NUMA system, where a dedicated cache for each ''processor'', ''core'' or ''node'' is used, a consistency problem may occur when a same data is stored in more than one cache. This problem arises when a data is modified in one cache. This problem can be solved in two ways: # Invalidate all the copies on other caches (broadcast-invalida ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Multiprocessor System Architecture
A multiprocessor (MP) system is defined as "a system with more than one ''Central processing unit, processor''", and, more precisely, "a number of central processing units linked together to enable parallel processing to take place". The key objective of a multiprocessor is to boost a system's execution speed. The other objectives are fault tolerance and application matching. The term "multiprocessor" can be confused with the term "multiprocessing". While multiprocessing is a type of processing in which two or more processors work together to execute multiple programs simultaneously, multiprocessor refers to a hardware architecture that allows multiprocessing. Multiprocessor systems are classified according to how processor memory access is handled and whether system processors are of a single type or various ones. Multiprocessor system types There are many types of multiprocessor systems: * Loosely coupled multiprocessor system * Tightly coupled multiprocessor system * Ho ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
