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Kinetis
The following is a partial list of NXP and Freescale Semiconductor products, including products formerly manufactured by Motorola until 2004. NXP and Freescale merged in 2015. Microprocessors Early microprocessors * Motorola MC10800 (4-bit) * Motorola MC14500B Industrial Control Unit (ICU) (1-bit) * Signetics 2650 (8-bit) * Motorola 6800 (8-bit) * Motorola 6802 (8-bit) * Motorola 6808 (8-bit) * Motorola 6809 (8/16-bit) 68000 series * Motorola 68000 (16/32-bit) * Motorola 68008 (8/16/32-bit) * Motorola 68010 (16/32-bit) * Motorola 68012 (16/32-bit) * Motorola 68020 (32-bit) * Motorola 68030 (32-bit) * Motorola 68451 ( MMU) * Motorola 68851 (MMU) * Motorola 68881 ( FPU) * Motorola 68882 (FPU) * Motorola 68040 (w/FPU) * Motorola 68060 (w/FPU) 88000 series (RISC) * Motorola 88100 * Motorola 88110 PowerPC and Power ISA processors * PPC 601 ("G1") * PPC 603/ PPC 603ev ("G2") * PPC 604/ PPC 604e/ PPC 604ev * PPC 620 * PowerPC 7xx family, PowerPC 740, 750, 745, and 755 only ("P ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Freescale Semiconductor
Freescale Semiconductor, Inc. was an American semiconductor manufacturer. It was created by the divestiture of the Semiconductor Products Sector of Motorola in 2004. Freescale focused their integrated circuit products on the automotive, embedded and communications markets. It was bought by a private investor group in 2006, and subsequently merged with NXP Semiconductors in 2015. History Divestiture from Motorola and first IPO As of 2003, Motorola Semiconductor Products Sector earned US$5.0 billion in semiconductor sales in 2002 (out of US$27 billion sales for all of Motorola). Motorola announced that their semiconductor division would be divested on October 6, 2003 and would have a temporary name ''SPS Spinco''. Freescale completed its Initial public offering (IPO) on July 16, 2004, at a price of US$13. In its announcement, it estimated the stock price to be US$17.50- 19.50 but following a cooling of the market towards tech stocks, it lowered its price to US$13. Existing sh ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Motorola 68851
The Motorola 68851 is an external Memory Management Unit (MMU) which is designed to provide paged memory support for the 68020 using that processor's coprocessor interface. In theory it can be used with other processors such as the 68010 by simulating the coprocessor interface in software. Later 68K family processors such as the 68030, 68040, and 68060 have an internal MMU, and will not operate with the 68851, except possibly by simulation of the coprocessor interface. The 68851 was available as an option for the Apple Macintosh II, and was necessary to run Apple's A/UX operating system. On the classic Mac OS, Connectix Virtual was released in early 1989 and used the 68851 to provide virtual memory, which was later integrated into System 7. Very few cards for the Amiga make use of the 68851 primarily because it can only be used with a small range of processors and most Amigas and accelerator cards use a processor which either has its own MMU or cannot support an MMU. One of th ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 7xx
The PowerPC 7xx is a family of third generation 32-bit PowerPC microprocessors designed and manufactured by IBM and Motorola (spun off as Freescale Semiconductor bought by NXP Semiconductors). This family is called the PowerPC G3 by Apple Computer (later Apple Inc.), which introduced it on November 10, 1997. A number of microprocessors from different vendors have been used under the "PowerPC G3" name. Such designations were applied to Mac computers such as the PowerBook G3, the multicolored iMacs, iBooks and several desktops, including both the Beige and Blue and White Power Macintosh G3s. The low power requirements and small size made the processors ideal for laptops and the name lived out its last days at Apple in the iBook. The 7xx family is also widely used in embedded devices like printers, routers, storage devices, spacecraft, and video game consoles. The 7xx family had its shortcomings, namely lack of SMP support and SIMD capabilities and a relatively weak FPU. Mo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 620
The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620. Nuclear family PowerPC 601 The PowerPC 601 was the first generation of microprocessors to support the basic 32-bit PowerPC instruction set. The design effort started in earnest in mid-1991 and the first prototype chips were available in October 1992. The first 601 processors were introduced in an IBM RS/6000 workstation in October 1993 (alongside its more powerful multichip cousin IBM POWER2 line of processors) and the first Apple Power ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 604e
The PowerPC 600 family was the first family of PowerPC microprocessor, processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620. Nuclear family PowerPC 601 The PowerPC 601 was the first generation of microprocessors to support the basic 32-bit PowerPC instruction set. The design effort started in earnest in mid-1991 and the first prototype chips were available in October 1992. The first 601 processors were introduced in an IBM RS/6000 workstation in October 1993 (alongside its more powerful multichip cousin IBM POWER2 line of processors) and the fir ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 604
The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620. Nuclear family PowerPC 601 The PowerPC 601 was the first generation of microprocessors to support the basic 32-bit PowerPC instruction set. The design effort started in earnest in mid-1991 and the first prototype chips were available in October 1992. The first 601 processors were introduced in an IBM RS/6000 workstation in October 1993 (alongside its more powerful multichip cousin IBM POWER2 line of processors) and the first Apple Power ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 601
The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620. Nuclear family PowerPC 601 The PowerPC 601 was the first generation of microprocessors to support the basic 32-bit PowerPC instruction set. The design effort started in earnest in mid-1991 and the first prototype chips were available in October 1992. The first 601 processors were introduced in an IBM RS/6000 workstation in October 1993 (alongside its more powerful multichip cousin IBM POWER2 line of processors) and the first Apple Powe ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Motorola 88110
The MC88110 was a microprocessor developed by Motorola that implemented the 88000 instruction set architecture (ISA). The MC88110 was a second-generation implementation of the 88000 ISA, succeeding the MC88100. It was designed for use in personal computers and workstations. History The first technical description of the MC88110 was given in November 1991 at the Microprocessor Forum held in San Francisco. The microprocessor was introduced in 1992, operating at 50 MHz. Users were Data General in their AViiON servers, Harris in real-time UNIX systems and Motorola in their single-board computers. NeXT was to introduce a workstation using the MC88110, the NeXT RISC Workstation, but they left the hardware business and cancelled the product before development had completed. Description It implemented extensions to the original ISA, such a separate floating-point register file, extended-precision (80-bit) floating-point data types and new integer and graphics instructions. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Motorola 88100
The MC88100 is a microprocessor developed by Motorola that implemented 88000 RISC instruction set architecture. Announced in 1988, the MC88100 was the first 88000 implementation. It was succeeded by the MC88110 in the early 1990s. The microprocessor has separate pipelined integer, floating-point add, floating-point multiply, and load/store execution units and dispatches a single instruction (at most) per clock cycle. The separate MC88200 integrated circuit optionally add level 1 cache and a paged memory management unit. An MC88100 system typically used two of these devices for instructions and data; additional MC88200s could be added to increase the size of the caches. This partitioned scheme was chosen to provide system flexibility, the amount of cache could be varied depending on the price point. In practice, these additional chips required more space on the circuit board and the buses between the MC88200s and MC88100 added complexity and cost. The MC88100 contained 165,000 t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Motorola 68060
The Motorola 68060 ("''sixty-eight-oh-sixty''") is a 32-bit microprocessor from Motorola released in April 1994. It is the successor to the Motorola 68040 and is the highest performing member of the 68000 series. The 68060 is the last development of the 68000 family for general purpose use, abandoned in favor of the PowerPC chips. Two derivatives were produced, the 68LC060 (low cost) which lacked the floating point unit (FPU) and the 68EC060 (embedded controller) which removed both the FPU and memory management unit (MMU). Architecture There is an LC (Low-Cost) version, without an FPU and EC (Embedded Controller), without MMU and FPU. The 68060 design was led by Joe Circello. The 68060 shares most architectural features with the P5 Pentium. Both have a very similar superscalar in-order dual instruction pipeline configuration, and an instruction decoder which breaks down complex instructions into simpler ones before execution, described publicly as "two four-stage RISC ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Motorola 68040
The Motorola 68040 ("''sixty-eight-oh-forty''") is a 32-bit microprocessor in the Motorola 68000 series, released in 1990. It is the successor to the 68030 and is followed by the 68060, skipping the 68050. In keeping with general Motorola naming, the 68040 is often referred to as simply the '040 (pronounced ''oh-four-oh'' or ''oh-forty''). The 68040 was the first 680x0 family member with an on-chip Floating-Point Unit (FPU). It thus included all of the functionality that previously required external chips, namely the FPU and Memory Management Unit (MMU), which was added in the 68030. It also had split instruction and data caches of 4 kilobytes each. It was fully pipelined, with six stages. Versions of the 68040 were created for specific market segments, including the 68LC040, which removed the FPU, and the 68EC040, which removed both the FPU and MMU. Motorola had intended the EC variant for embedded use, but embedded processors during the 68040's time did not need t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
