Intel APIC Architecture
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Intel APIC Architecture
In computing, Intel's Advanced Programmable Interrupt Controller (APIC) is a family of interrupt controllers. As its name suggests, the APIC is more advanced than Intel's 8259 Programmable Interrupt Controller (PIC), particularly enabling the construction of multiprocessor systems. It is one of several architectural designs intended to solve interrupt routing efficiency issues in multiprocessor computer systems. The APIC is a split architecture design, with a local component (LAPIC) usually integrated into the processor itself, and an optional I/O APIC on a system bus. The first APIC was the 82489DX it was a discrete chip that functioned both as local and I/O APIC. The 82489DX enabled construction of symmetric multiprocessor (SMP) systems with the Intel 486 and early Pentium processors; for example, the reference two-way 486 SMP system used three 82489DX chips, two as local APICs and one as I/O APIC. Starting with the P54C processor, the local APIC functionality was integrated ...
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Computing
Computing is any goal-oriented activity requiring, benefiting from, or creating computing machinery. It includes the study and experimentation of algorithmic processes, and development of both hardware and software. Computing has scientific, engineering, mathematical, technological and social aspects. Major computing disciplines include computer engineering, computer science, cybersecurity, data science, information systems, information technology and software engineering. The term "computing" is also synonymous with counting and calculating. In earlier times, it was used in reference to the action performed by mechanical computing machines, and before that, to human computers. History The history of computing is longer than the history of computing hardware and includes the history of methods intended for pen and paper (or for chalk and slate) with or without the aid of tables. Computing is intimately tied to the representation of numbers, though mathematical ...
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Message Signaled Interrupts
Message Signalled Interrupts (MSI) are an alternative in-band method of signalling an interrupt, using special in-band messages to replace traditional out-of-band assertion of dedicated interrupt lines. While more complex to implement in a device, message signalled interrupts have some significant advantages over pin-based out-of-band interrupt signalling. Message signalled interrupts are supported in PCI bus since its version 2.2, and in later available PCI Express bus. Some non-PCI architectures also use message signalled interrupts. Overview Traditionally, a device has an interrupt line (pin) which it asserts when it wants to signal an interrupt to the host processing environment. This traditional form of interrupt signalling is an out-of-band form of control signalling since it uses a dedicated path to send such control information, separately from the main data path. MSI replaces those dedicated interrupt lines with in-band signalling, by exchanging special messages that ...
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I/O Controller Hub
I/O Controller Hub (ICH) is a family of Intel southbridge microchips used to manage data communications between a CPU and a motherboard, specifically Intel chipsets based on the Intel Hub Architecture. It is designed to be paired with a second support chip known as a northbridge. As with any other southbridge, the ICH is used to connect and control peripheral devices. As CPU speeds increased data transmission between the CPU and support chipset, the support chipset eventually emerged as a bottleneck between the processor and the motherboard. Accordingly, starting with the Intel 5 Series, a new architecture was used that incorporated some functions of the traditional north and south bridge chips onto the CPU itself, with the remaining functions being consolidated into a single Platform Controller Hub (PCH). This replaces the traditional two chip setup. ICH The first version of the ICH was released in June 1999 along with the Intel 810 northbridge. While its predecessor, the ...
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PIIX4
PCI IDE ISA Xcelerator (PIIX), also known as Intel 82371, is a family of Intel southbridge microchips employed in some Intel chipsets. x86 virtualization implementations often support emulations of various PIIX-based chipsets. Versions PIIX The PIIX integrated an IDE controller with two 8237 DMA controllers, the 8254 PIT, and two 8259 PICs and a PCI to ISA bus bridge. It was introduced with the 430FX Triton chipset in 1995. The mobile version was introduced with the 430MX mobile Triton chipset. The following variations existed: *82371FB (PIIX) *82371MX (MPIIX) Mobile PIIX3 The PIIX3 introduced a USB 1.0 controller and support for an external I/O APIC. It was used with the 430HX and 430VX Triton II and 440FX northbridges. The following variations existed: *82371SB (PIIX3) PIIX4 The PIIX4 introduced ACPI support, an improved IDE controller with Ultra DMA/33 or ATA-4 support and an integrated a MC146818 style RTC and CMOS controller. It was used with the 430TX and the ...
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VMware
VMware, Inc. is an American cloud computing and virtualization technology company with headquarters in Palo Alto, California. VMware was the first commercially successful company to virtualize the x86 architecture. VMware's desktop software runs on Microsoft Windows, Linux, and macOS. VMware ESXi, its enterprise software hypervisor, is an operating system that runs on server hardware. In May 2022, Broadcom Inc. announced an agreement to acquire VMware in a cash-and-stock transaction valued at $61 billion. History Early history In 1998, VMware was founded by Diane Greene, Mendel Rosenblum, Scott Devine, Ellen Wang and Edouard Bugnion. Greene and Rosenblum were both graduate students at the University of California, Berkeley. Edouard Bugnion remained the chief architect and CTO of VMware until 2005, and went on to found Nuova Systems (now part of Cisco). For the first year, VMware operated in stealth mode, with roughly 20 employees by the end of 1998. The company wa ...
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Programmable Interval Timer
In CPU, computing and in embedded systems, a programmable interval timer (PIT) is a Counter (digital), counter that generates an output signal when it reaches a programmed count. The output signal may trigger an interrupt. Common features PITs may be one-shot or periodic. One-shot timers will signal only once and then stop counting. Periodic timers signal every time they reach a specific value and then restart, thus producing a signal at periodic intervals. Periodic timers are typically used to invoke activities that must be performed at regular intervals. Counters are usually programmed with fixed intervals that determine how long the counter will count before it will output a signal. IBM PC compatible The Intel 8253 PIT was the original timing device used on IBM PC compatibles. It used a 1.193182 MHz clock signal (one third of the color burst frequency used by NTSC, one twelfth of the system clock crystal oscillator, therefore one quarter of the 4.77 MHz CPU clock) and contains ...
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8253
The Intel 8253 and 8254 are programmable interval timers (PITs), which perform timing and counting functions using three 16-bit counters. The 825x family was primarily designed for the Intel 8080/Intel 8085, 8085-processors, but were later used in x86 compatible systems. The 825x chips, or an equivalent circuit embedded in a larger chip, are found in all IBM PC compatibles and Soviet computers like the Vector-06C. In PC compatibles, Timer Channel 0 is assigned to Interrupt request (PC architecture), IRQ-0 (the highest priority hardware interrupt). Timer Channel 1 is assigned to DRAM refresh (at least in early models before the 80386). Timer Channel 2 is assigned to the PC speaker. The Intel 82c54 (c for CMOS logic) variant handles up to 10 MHz clock signals. History The 8253 is described in the 1980 Intel "Component Data Catalog" publication. The 8254, described as a superset of the 8253 with higher clock speed ratings, has a "preliminary" data sheet in the 1982 Intel " ...
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Tickless Kernel
A tickless kernel is an operating system kernel in which timer interrupts do not occur at regular intervals, but are only delivered as required. The Linux kernel on s390 from 2.6.6 and on i386 from release 2.6.21 can be configured to turn the timer tick off (''tickless'' or ''dynamic tick'') for idle CPUs using CONFIG_NO_HZ, and from 3.10 with CONFIG_NO_HZ_IDLE extended for non-idle processors with CONFIG_NO_HZ_FULL. The XNU kernel in Mac OS X 10.4 on, and the NT kernel in Windows 8 on, are also tickless. The Solaris 8 kernel introduced the cyclic subsystem which allows arbitrary resolution timers and tickless operation.. FreeBSD 9 introduced a "dynamic tick mode" (aka tickless). As of 2020, there is a plan to add this to MINIX 3 Minix 3 is a small, Unix-like operating system. It is published under a BSD-3-Clause license and is a successor project to the earlier versions, Minix 1 and 2. The project's main goal is for the system to be fault-tolerant by detecting and ... ...
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Linux Kernel
The Linux kernel is a free and open-source, monolithic, modular, multitasking, Unix-like operating system kernel. It was originally authored in 1991 by Linus Torvalds for his i386-based PC, and it was soon adopted as the kernel for the GNU operating system, which was written to be a free (libre) replacement for Unix. Linux is provided under the GNU General Public License version 2 only, but it contains files under other compatible licenses. Since the late 1990s, it has been included as part of a large number of operating system distributions, many of which are commonly also called Linux. Linux is deployed on a wide variety of computing systems, such as embedded devices, mobile devices (including its use in the Android operating system), personal computers, servers, mainframes, and supercomputers. It can be tailored for specific architectures and for several usage scenarios using a family of simple commands (that is, without the need of manually editing its source c ...
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CPU-Z
CPU-Z is a freeware system profiling and monitoring application for Microsoft Windows and Android that detects the central processing unit, RAM, motherboard chip-set, and other hardware features of a modern personal computer or Android device. Features CPU-Z is more comprehensive in virtually all areas compared to the tools provided in the Windows OS to identify various hardware components, and thus assists in identifying certain components without the need of opening the case; particularly the core revision and RAM clock rate. It also provides information on the system's GPU. See also * CPUID * Benchmark (computing) * GPU-Z * Speccy Speccy, developed by Piriform Software, is a freeware utility software and runs under Microsoft Windows 10, Windows 8, Windows 7, Vista and XP for both IA-32 and x64 versions of these operating systems, which shows the user information about ... References External links CPU-Z official website(December 2009) Softpedia review(Octo ...
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Windows 8
Windows 8 is a major release of the Windows NT operating system developed by Microsoft. It was released to manufacturing on August 1, 2012; it was subsequently made available for download via MSDN and TechNet on August 15, 2012, and later to retail on October 26, 2012. Windows 8 introduced major changes to the operating system's platform and user interface intended to improve its user experience on tablets, where Windows was now competing with mobile operating systems, including Android and iOS. In particular, these changes included a touch-optimized Windows shell based on Microsoft's Metro design language and the Start screen, a new platform for developing apps with an emphasis on touchscreen input, integration with online services, and Windows Store, an online distribution for downloading and purchasing new software, and a new keyboard shortcut for screenshots. Many of these features were adopted from Windows Phone. Windows 8 added support for USB 3.0, Advance ...
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Profiling (computer Programming)
In software engineering, profiling ("program profiling", "software profiling") is a form of dynamic program analysis that measures, for example, the space (memory) or time complexity of a program, the usage of particular instructions, or the frequency and duration of function calls. Most commonly, profiling information serves to aid program optimization, and more specifically, performance engineering. Profiling is achieved by instrumenting either the program source code or its binary executable form using a tool called a ''profiler'' (or ''code profiler''). Profilers may use a number of different techniques, such as event-based, statistical, instrumented, and simulation methods. Gathering program events Profilers use a wide variety of techniques to collect data, including hardware interrupts, code instrumentation, instruction set simulation, operating system hooks, and performance counters. Use of profilers The output of a profiler may be: * A statistical ''s ...
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