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Intel M5
Intel Core M is a family of ultra low-voltage microprocessors belonging to the Intel Core series and designed specifically for ultra-thin notebooks, 2-in-1 detachables, and other mobile devices. The thermal design power (TDP) of all Core M microprocessors is 5 watts or lower. Intel Core M microprocessors are generally used in fanless devices due to their low TDP. Broadwell microarchitecture (5th generation) "Broadwell-Y" (SoC, dual-core, 14 nm) * All models support: '' MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, FMA3, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Intel VT-d, Hyper-threading, Turbo Boost, AES-NI, Smart Cache.'' * All models except M-5Y10a and M-5Y70 support Configurable TDP. * M-5Y70 and M-5Y71 also support ''Intel vPro''. * GPU and memory controller (up to 2 × DDR3-1600) are integrated onto the processor die. * Peripherals include 12 lanes of PCI Express 2.0, in x4, x2, and x1 configuration ...
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Consumer Ultra-Low Voltage
Consumer Ultra-Low Voltage (CULV) is a computing platform developed by Intel.Rumored Intel CULV ultra-low-power notebook in the works
arstechnica.com, accessed at 1 May 2009

, news.com, accessed at 1 May 2009
It was estimated in January 2009 that this market could reach 10 million CULV laptops shipped during that year. Competing platforms are the ,
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Intel 64
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mode. With 64-bit mode and the new paging mode, it supports vastly larger amounts of virtual memory and physical memory than was possible on its 32-bit predecessors, allowing programs to store larger amounts of data in memory. x86-64 also expands general-purpose registers to 64-bit, and expands the number of them from 8 (some of which had limited or fixed functionality, e.g. for stack management) to 16 (fully general), and provides numerous other enhancements. Floating-point arithmetic is supported via mandatory SSE2-like instructions, and x87/ MMX style registers are generally not used (but still available even in 64-bit mode); instead, a set of 16 vector registers, 128 bits each, is used. (Each register can store one or two double-precisi ...
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List Of Intel Core I7 Microprocessors
The following is a list of Intel Core i7 brand microprocessors. Introduced in 2008, the Core i7 line of microprocessors are intended to be used by high-end users. Desktop processors Nehalem microarchitecture (1st generation) "Bloomfield" (45 nm) * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Hyper-threading, Turbo Boost, Smart Cache. * FSB has been replaced with QPI. * Transistors: 731 million * Die size: 263 mm * Steppings: C0, D0 "Lynnfield" (45 nm) * All models support: MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threading, Turbo Boost, Smart Cache. * Core i7-875K features an unlocked multiplier and does not support Intel TXT and Intel VT-d. * FSB has been replaced with DMI. *Moves the QPI link and PCI ...
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List Of Intel Core I5 Microprocessors
The following is a list of Intel Core i5 brand microprocessors. Introduced in 2009, the Core i5 line of microprocessors are intended to be used by mainstream users. Desktop processors Nehalem microarchitecture (1st generation) "Lynnfield" (45 nm) * All models support: '' MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), Intel VT-x, Turbo Boost, Smart Cache.'' * FSB has been replaced with DMI. * Transistors: 774 million * Die size: 296 mm² * Stepping: B1 Westmere microarchitecture (1st generation) " Clarkdale" ( MCP, 32 nm dual-core) * All models support: '' MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, Enhanced Intel SpeedStep Technology (EIST), Intel 64, XD bit (an NX bit implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threading, Turbo Boost, AES-NI, Smart Cache.'' * Core i5-655K, Core i5-661 does not support ''Intel TXT and Intel VT-d.'' * Core i5-655K fe ...
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Kaby Lake
Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's previous " tick–tock" manufacturing and design model, Kaby Lake represents the optimized step of the newer process–architecture–optimization model. Kaby Lake began shipping to manufacturers and OEMs in the second quarter of 2016, and mobile chips have started shipping while Kaby Lake (desktop) chips were officially launched in January 2017. In August 2017, Intel announced Kaby Lake Refresh ( Kaby Lake R) marketed as the 8th generation mobile CPUs, breaking the long cycle where architectures matched the corresponding generations of CPUs. Skylake was anticipated to be succeeded by the 10 nanometer Cannon Lake, but it was announced in July 2015 that Cannon Lake had been delayed until the second half of 2017. In the meantime, Intel re ...
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Intel TXT
Intel Trusted Execution Technology (Intel TXT, formerly known as LaGrande Technology) is a computer hardware technology whose primary goals are: * Attestation of the authenticity of a platform and its operating system. * Assuring that an authentic operating system starts in a trusted environment, which can then be considered trusted. * Provision of a trusted operating system with additional security capabilities not available to an unproven one. Intel TXT uses a Trusted Platform Module (TPM) and cryptographic techniques to provide measurements of software and platform components so that system software as well as local and remote management applications may use those measurements to make trust decisions. It complements Intel Management Engine. This technology is based on an industry initiative by the Trusted Computing Group (TCG) to promote safer computing. It defends against software-based attacks aimed at stealing sensitive information by corrupting system or BIOS code, or mod ...
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Skylake (microarchitecture)
Skylake is the codename used by Intel for a processor microarchitecture that was launched in August 2015 succeeding the Broadwell microarchitecture. Skylake is a microarchitecture redesign using the same 14 nm manufacturing process technology as its predecessor, serving as a tock in Intel's tick–tock manufacturing and design model. According to Intel, the redesign brings greater CPU and GPU performance and reduced power consumption. Skylake CPUs share their microarchitecture with Kaby Lake, Coffee Lake, Cannon Lake, Whiskey Lake, and Comet Lake CPUs. Skylake is the last Intel platform on which Windows earlier than Windows 10 will be officially supported by Microsoft, although enthusiast-created modifications exist that allow Windows 8.1 and earlier to continue to receive Windows Updates on later platforms. Some of the processors based on the Skylake microarchitecture are marketed as 6th-generation Core. Intel officially declared end of life and discontinued Sk ...
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Intel VPro
Intel vPro technology is an umbrella marketing term used by Intel for a large collection of computer hardware technologies, including VT-x, VT-d, Trusted Execution Technology (TXT), and Intel Active Management Technology (AMT). When the vPro brand was launched (circa 2007), it was identified primarily with AMT, thus some journalists still consider AMT to be the essence of vPro. vPro features Intel vPro is a brand name for a set of PC hardware features. PCs that support vPro have a vPro-enabled processor, a vPro-enabled chipset, and a vPro-enabled BIOS as their main elements. A vPro PC includes: * Multi-core, multi-threaded Xeon or Core processors. * Intel Active Management Technology (Intel AMT), a set of hardware-based features targeted at businesses, allow remote access to the PC for management and security tasks, when an OS is down or PC power is off. Note that AMT is not the same as Intel vPro; AMT is only one element of a vPro PC. * Remote configuration technology for AMT, ...
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Thermal Design Power
The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often a CPU, GPU or system on a chip) that the cooling system in a computer is designed to dissipate under any workload. Some sources state that the peak power rating for a microprocessor is usually 1.5 times the TDP rating. Intel has introduced a new metric called ''scenario design power'' (SDP) for some Ivy Bridge Y-series processors. Calculation The ''average CPU power'' (ACP) is the power consumption of central processing units, especially server processors, under "average" daily usage as defined by Advanced Micro Devices (AMD) for use in its line of processors based on the K10 microarchitecture ( Opteron 8300 and 2300 series processors). Intel's thermal design power (TDP), used for Pentium and Core 2 processors, measures the energy consumption under high workload; it is numerically somewhat higher than the "average" ACP rat ...
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AES Instruction Set
An Advanced Encryption Standard instruction set is now integrated into many processors. The purpose of the instruction set is to improve the speed and security of applications performing encryption and decryption using Advanced Encryption Standard (AES). They are often implemented as instructions implementing a single round of AES along with a special version for the last round which has a slightly different method. The side channel attack surface of AES is reduced when implemented in an instruction set, compared to when AES is implemented in software only. x86 architecture processors AES-NI (or the Intel Advanced Encryption Standard New Instructions; AES-NI) was the first major implementation. AES-NI is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008. Instructions Intel The following Intel processors support the AES-NI instruction set: * Westmere based processors, specifically: ** Westmere ...
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Turbo Boost
Intel Turbo Boost is Intel's trade name for central processing units (CPUs) dynamic frequency scaling feature that automatically raises certain versions of its operating frequency when demanding tasks are running, thus enabling a higher resulting performance. The frequency is accelerated when the operating system requests the highest performance state of the processor. Processor performance states are defined by the Advanced Configuration and Power Interface (ACPI) specification, an open standard supported by all major operating systems; no additional software or drivers are required to support the technology. The design concept behind Turbo Boost is commonly referred to as "dynamic overclocking". When the workload on the processor calls for faster performance, the processor's clock will try to increase the operating frequency in regular increments as required to meet demand. The increased clock rate is limited by the processor's power, current, and thermal limits, the number of ...
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Hyper-threading
Hyper-threading (officially called Hyper-Threading Technology or HT Technology and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multiple tasks at once) performed on x86 microprocessors. It was introduced on Xeon server processors in February 2002 and on Pentium 4 desktop processors in November 2002. Since then, Intel has included this technology in Itanium, Atom, and Core 'i' Series CPUs, among others. For each processor core that is physically present, the operating system addresses two virtual (logical) cores and shares the workload between them when possible. The main function of hyper-threading is to increase the number of independent instructions in the pipeline; it takes advantage of superscalar architecture, in which multiple instructions operate on separate data in parallel. With HTT, one physical core appears as two processors to the operating system, a ...
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