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IBM Scalable POWERparallel
Scalable POWERparallel (SP) is a series of supercomputers from IBM. SP systems were part of the IBM RISC System/6000 (RS/6000) family, and were also called the RS/6000 SP. The first model, the SP1, was introduced in February 1993, and new models were introduced throughout the 1990s until the RS/6000 was succeeded by eServer pSeries in October 2000. The SP is a distributed memory system, consisting of multiple RS/6000-based nodes interconnected by an IBM-proprietary switch called the High Performance Switch (HPS). The nodes are clustered using software called PSSP, which is mainly written in Perl. Computer scientist Marc Snir was awarded the Seymour Cray Computer Engineering Award by the Institute of Electrical and Electronics Engineers in 2013 for his contributions to supercomputing, which included his work on the SP. Notable systems * The Cornell Theory Center had a 512-node system that was ranked as the sixth fastest supercomputer in the world by the November 1995 edition ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
RS/6000
The RISC System/6000 (RS/6000) is a family of Reduced instruction set computer, RISC-based Unix Server (computing), servers, workstations and supercomputers made by IBM in the 1990s. The RS/6000 family replaced the IBM RT PC computer platform in February 1990 and was the first computer line to see the use of IBM's IBM Power microprocessors, POWER and PowerPC based microprocessors. In October 2000, the RS/6000 brand was retired for POWER-based servers and replaced by the pSeries, eServer pSeries. Workstations continued under the RS/6000 brand until 2002, when new POWER-based workstations were released under the IntelliStation POWER brand. History The first RS/6000 models used the Micro Channel architecture, Micro Channel bus, later models used Peripheral Component Interconnect, PCI. Some later models conformed to the PReP and Common Hardware Reference Platform, CHRP standard platforms, which were co-developed with Apple Inc., Apple and Motorola, with Open Firmware. The plan was ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
GFLOPS
In computing, floating point operations per second (FLOPS, flops or flop/s) is a measure of computer performance, useful in fields of scientific computations that require floating-point calculations. For such cases, it is a more accurate measure than measuring instructions per second. Floating-point arithmetic Floating-point arithmetic is needed for very large or very small real numbers, or computations that require a large dynamic range. Floating-point representation is similar to scientific notation, except everything is carried out in base two, rather than base ten. The encoding scheme stores the sign, the exponent (in base two for Cray and VAX, base two or ten for IEEE floating point formats, and base 16 for IBM Floating Point Architecture) and the significand (number after the radix point). While several similar formats are in use, the most common is ANSI/IEEE Std. 754-1985. This standard defines the format for 32-bit numbers called ''single precision'', as well as 64-b ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
POWER2
The POWER2, originally named RIOS2, is a processor designed by IBM that implemented the POWER instruction set architecture. The POWER2 was the successor of the POWER1, debuting in September 1993 within IBM's RS/6000 systems. When introduced, the POWER2 was the fastest microprocessor, surpassing the Alpha 21064. When the Alpha 21064A was introduced in 1993, the POWER2 lost the lead and became second. IBM claimed that the performance for a 62.5 MHz POWER2 was 73.3 SPECint92 and 134.6 SPECfp92. The open source GCC compiler removed support for POWER1 (RIOS) and POWER2 (RIOS2) in the 4.5 release. Description Improvements over the POWER1 included enhancements to the POWER instruction set architecture (consisting of new user and system instructions and other system-related features), higher clock rates (55 to 71.5 MHz), an extra fixed point unit and floating point unit, a larger 32 KB instruction cache, and a larger 128 or 256 KB data cache. The POWER2 was a mult ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
POWER1
The POWER1 is a Integrated circuit, multi-chip Central processing unit, CPU developed and Semiconductor device fabrication, fabricated by IBM that implemented the IBM POWER Instruction Set Architecture, POWER instruction set, instruction set architecture (ISA). It was originally known as the RISC System/6000 CPU or, when in an abbreviated form, the RS/6000 CPU, before introduction of successors required the original name to be replaced with one that used the same naming scheme (POWER''n'') as its successors in order to differentiate it from the newer designs. History The POWER1 was introduced in 1990, with the introduction of the IBM RS/6000 POWERserver Server (computing), servers and POWERstation workstations, which featured the POWER1 clocked at 20, 25 or 30 MHz. The POWER1 received two upgrades, one in 1991, with the introduction of the POWER1+ and in 1992, with the introduction of POWER1++. These upgraded versions were clocked higher than the original POWER1, made possible ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Lawrence Berkeley National Laboratory
Lawrence Berkeley National Laboratory (LBNL), commonly referred to as the Berkeley Lab, is a United States Department of Energy National Labs, United States national laboratory that is owned by, and conducts scientific research on behalf of, the United States Department of Energy. Located in the Berkeley Hills, hills of Berkeley, California, the lab overlooks the campus of the University of California, Berkeley, and is managed by the University of California system. History 1931–1941 The laboratory was founded on August 26, 1931, by Ernest Lawrence, as the Radiation Laboratory of the University of California, Berkeley, associated with the Physics Department. It centered physics research around his new instrument, the cyclotron, a type of particle accelerator for which he was awarded the Nobel Prize in Physics in 1939. Throughout the 1930s, Lawrence pushed to create larger and larger machines for physics research, courting private philanthropy, philanthropists for funding. He ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ASCI White
ASCI White was a supercomputer at the Lawrence Livermore National Laboratory in California, which was briefly the fastest supercomputer in the world. It was a computer cluster based on IBM's commercial RS/6000 SP computer. 512 nodes were interconnected for ASCI White, with each node containing sixteen 375MHz IBM POWER3-II processors. In total, the ASCI White had 8,192 processors, 6terabytes (TB) of memory, and 160TB of disk storage. It was almost exclusively used for large-scale computations requiring dozens, hundreds, or thousands of processors. The computer weighed 106tons and consumed 3MW of electricity with a further 3MW needed for cooling. It had a theoretical processing speed of 12.3 teraFLOPS (TFLOPS). A single modern 4U rackmount server could match these specifications while weighing under 50 kg and consuming under 2 kW of power. The system ran IBM's AIX operating system. ASCI White was made up of three individual systems, the 512-node White, the 28-node ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Advanced Strategic Computing Initiative
The Advanced Simulation and Computing Program (or ASC) is a super-computing program run by the National Nuclear Security Administration, in order to simulate, test, and maintain the United States nuclear stockpile. The program was created in 1995 in order to support the Stockpile Stewardship Program (or SSP). The goal of the initiative is to extend the lifetime of the current aging stockpile. History After the United States' 1992 moratorium on live nuclear testing, the Stockpile Stewardship Program was created in order to find a way to test, and maintain the nuclear stockpile. In response, the National Nuclear Security Administration began to simulate the nuclear warheads using supercomputers. As the stockpile ages, the simulations have become more complex, and the maintenance of the stockpile requires more computing power. Over the years, due to Moore's Law, the ASC program has created several different supercomputers with increasing power, in order to compute the simulations ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Lawrence Livermore National Laboratory
Lawrence Livermore National Laboratory (LLNL) is a federal research facility in Livermore, California, United States. The lab was originally established as the University of California Radiation Laboratory, Livermore Branch in 1952 in response to the detonation of the first atomic bomb by the Soviet Union during the Cold War. It later became autonomous in 1971 and was designated a national laboratory in 1981. A federally funded research and development center, Lawrence Livermore Lab is primarily funded by the U.S. Department of Energy and it is managed privately and operated by Lawrence Livermore National Security, LLC (a partnership of the University of California), Bechtel, BWX Technologies, AECOM, and Battelle Memorial Institute in affiliation with the Texas A&M University System. In 2012, the laboratory had the synthetic chemical element livermorium (element 116) named after it. Overview LLNL is self-described as a "premier research and development institution for sci ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
TFLOPS
In computing, floating point operations per second (FLOPS, flops or flop/s) is a measure of computer performance, useful in fields of scientific computations that require floating-point calculations. For such cases, it is a more accurate measure than measuring instructions per second. Floating-point arithmetic Floating-point arithmetic is needed for very large or very small real numbers, or computations that require a large dynamic range. Floating-point representation is similar to scientific notation, except everything is carried out in base two, rather than base ten. The encoding scheme stores the sign, the exponent (in base two for Cray and VAX, base two or ten for IEEE floating point formats, and base 16 for IBM Floating Point Architecture) and the significand (number after the radix point). While several similar formats are in use, the most common is ANSI/IEEE Std. 754-1985. This standard defines the format for 32-bit numbers called ''single precision'', as well as 64-b ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PowerPC 600
The PowerPC 600 family was the first family of PowerPC processors built. They were designed at the Somerset facility in Austin, Texas, jointly funded and staffed by engineers from IBM and Motorola as a part of the AIM alliance. Somerset was opened in 1992 and its goal was to make the first PowerPC processor and then keep designing general purpose PowerPC processors for personal computers. The first incarnation became the PowerPC 601 in 1993, and the second generation soon followed with the PowerPC 603, PowerPC 604 and the 64-bit PowerPC 620. Nuclear family PowerPC 601 The PowerPC 601 was the first generation of microprocessors to support the basic 32-bit PowerPC instruction set. The design effort started in earnest in mid-1991 and the first prototype chips were available in October 1992. The first 601 processors were introduced in an IBM RS/6000 workstation in October 1993 (alongside its more powerful multichip cousin IBM POWER2 line of processors) and the first Apple Power M ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ASCI Blue Pacific
ASCI Blue Pacific was a supercomputer installed at the Lawrence Livermore National Laboratory (LLNL) in Livermore, CA at the end of 1998. It was a collaboration between IBM and LLNL. It was an IBM RS/6000 SP ''massively parallel processing'' system. It contained 5,856 PowerPC 604e microprocessors. Its theoretical top performance was 3.9 teraflops. It was built as a stage of the Accelerated Strategic Computing Initiative (ASCI) started by the U.S. Department of Energy and the National Nuclear Security Administration to build a simulator to replace live nuclear weapon testing following the moratorium on testing started by President George H. W. Bush in 1992 and extended by Bill Clinton William Jefferson Clinton ( né Blythe III; born August 19, 1946) is an American politician who served as the 42nd president of the United States from 1993 to 2001. He previously served as governor of Arkansas from 1979 to 1981 and agai ... in 1993. External links * * One-o ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Garry Kasparov
Garry Kimovich Kasparov (born 13 April 1963) is a Russian chess grandmaster, former World Chess Champion, writer, political activist and commentator. His peak rating of 2851, achieved in 1999, was the highest recorded until being surpassed by Magnus Carlsen in 2013. From 1984 until his retirement in 2005, Kasparov was ranked world No. 1 for a record 255 months overall for his career, the most in history. Kasparov also holds records for the most consecutive professional tournament victories (15) and Chess Oscars (11). Kasparov became the youngest ever undisputed World Chess Champion in 1985 at age 22 by defeating then-champion Anatoly Karpov. He held the official FIDE world title until 1993, when a dispute with FIDE led him to set up a rival organization, the Professional Chess Association. In 1997 he became the first world champion to lose a match to a computer under standard time controls when he lost to the IBM supercomputer Deep Blue in a highly publicized match. He co ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
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