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Freescale S08
The 9S08 (68HCS08 or S08 for short) is a 8-bit microcontroller (µC) family originally produced by Motorola, later by Freescale Semiconductor, and currently by NXP, descended from the Motorola 6800 microprocessor. It is a CISC microcontroller. A slightly extended variant of the 68HC08, it shares upward compatibility with the aging 68HC05 microcontrollers, and is found in almost any type of embedded systems. The larger members offer up to 128 KiB of flash, and 8 KiB of RAM via a simple MMU which allows bank-switching 16 KiB of the address space and an address/data register pair which allows data fetches from any address. The paging scheme used allows for a theoretical maximum of 4MB of flash. MMU equipped variants offer two extra CPU instructions, CALL and RTC, which are used instead of JSR and RTS respectively when dealing with subroutines placed in paged memory, allowing direct page-to-page subroutine calls. In a single atomic operation, CALL saves and RTC ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Freescale 68HC08
The 68HC08 (HC08 in short) is a broad family of 8-bit microcontrollers originally from Motorola Semiconductor, later from Freescale Semiconductor. HC08's are fully code-compatible with their predecessors, the Motorola 68HC05. Like all Motorola processors that share lineage from the 6800, they use the von Neumann architecture as well as memory-mapped I/O. This family has five CPU registers that are not part of the memory. One 8-bit accumulator A, a 16-bit index register H:X, a 16-bit stack pointer SP, a 16-bit program counter PC, and an 8-bit condition code register CCR. Some instructions refer to the different bytes in the H:X index register independently. Among the HC08's there are dozens of processor families, each targeted to different embedded applications. Features and capabilities vary widely, from 8 to 64-pin processors, from LIN connectivity to USB Universal Serial Bus (USB) is an industry standard that establishes specifications for cables, connectors and p ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
8-bit
In computer architecture, 8-bit Integer (computer science), integers or other Data (computing), data units are those that are 8 bits wide (1 octet (computing), octet). Also, 8-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on processor register, registers or Bus (computing), data buses of that size. Memory addresses (and thus address buses) for 8-bit CPUs are generally larger than 8-bit, usually 16-bit. 8-bit microcomputers are microcomputers that use 8-bit microprocessors. The term '8-bit' is also applied to the character sets that could be used on computers with 8-bit bytes, the best known being various forms of extended ASCII, including the ISO/IEC 8859 series of national character sets especially ISO/IEC 8859-1, Latin 1 for English and Western European languages. The IBM System/360 introduced byte-addressable memory with 8-bit bytes, as opposed to bit-addressable or decimal digit-addressable or word-addressable memory ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Opcode
In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the operation to be performed. Beside the opcode itself, most instructions also specify the data they will process, in the form of operands. In addition to opcodes used in the instruction set architectures of various CPUs, which are hardware devices, they can also be used in abstract computing machines as part of their byte code specifications. Overview Specifications and format of the opcodes are laid out in the instruction set architecture ( ISA) of the processor in question, which may be a general CPU or a more specialized processing unit. Opcodes for a given instruction set can be described through the use of an opcode table detailing all possible opcodes. Apart from the opcode itself, an instruction normally also has one or more specifiers ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Motorola Microcontrollers
Motorola, Inc. () was an American multinational telecommunications company based in Schaumburg, Illinois, United States. After having lost $4.3 billion from 2007 to 2009, the company split into two independent public companies, Motorola Mobility and Motorola Solutions on January 4, 2011. Motorola Solutions is the legal successor to Motorola, Inc., as the reorganization was structured with Motorola Mobility being spun off. Motorola Mobility was acquired by Lenovo in 2014. Motorola designed and sold wireless network equipment such as cellular transmission base stations and signal amplifiers. Motorola's home and broadcast network products included set-top boxes, digital video recorders, and network equipment used to enable video broadcasting, computer telephony, and high-definition television. Its business and government customers consisted mainly of wireless voice and broadband systems (used to build private networks), and, public safety communications systems like Astro an ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CodeWarrior
CodeWarrior is an integrated development environment (IDE) published by NXP Semiconductors for editing, compiling, and debugging software for several microcontrollers and microprocessors (Freescale ColdFire, ColdFire+, Kinetis, Qorivva, PX, Freescale RS08, Freescale S08, and S12Z) and digital signal controllers (DSC MC56F80X and MC5680XX) used in embedded systems. The system was developed by Metrowerks on the Macintosh, and was among the first development systems on that platform to cleanly support both the existing Motorola 68k and the new PowerPC (PPC). During Apple's transition to the PPC, CodeWarrior quickly became the ''de facto'' standard development system for the Mac, rapidly displacing Symantec's THINK C and Apple's own Macintosh Programmer's Workshop. The purchase of NeXT in 1996 led to a decline in CodeWarrior's relevance as Mac programming moved to the NeXT platform's own developer tools. Metrowerks responded by porting CodeWarrior to Microsoft Windows and introduc ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Small Device C Compiler
The Small Device C Compiler (SDCC) is a free-software, partially retargetable C compiler for 8-bit microcontrollers. It is distributed under the GNU General Public License. The package also contains an assembler, linker, simulator and debugger. As of March 2007, SDCC is the only open-source C compiler for Intel 8051-compatible microcontrollers. In 2011 the compiler was downloaded on average more than 200 times per day. Supported hosts Sources, documentation, and binaries are available for Linux (32-bit and 64-bit), macOS (PPC and 64-bit), and Windows (32-bit and 64-bit). Supported targets The following include binary compatible derivatives: * Intel 8031, 8032, 8051, 8052; Maxim/Dallas DS80C390; C8051 * Motorola/Freescale/ NXP 68HC08 and 68HCS08 * Padauk PDK14 and PDK15 * STMicroelectronics STM8 * Zilog Z80, Z180, eZ80 in Z80 mode; Rabbit Semiconductor 2000, 2000A, 3000, 3000A, 4000; Sharp LR35902 (Game Boy processor); Toshiba TLCS-90; Z80N (ZX Spectrum Next processor). ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CAN Bus
A Controller Area Network (CAN bus) is a robust vehicle bus standard designed to allow microcontrollers and devices to communicate with each other's applications without a host computer. It is a message-based protocol, designed originally for multiplex electrical wiring within automobiles to save on copper, but it can also be used in many other contexts. For each device, the data in a frame is transmitted serially but in such a way that if more than one device transmits at the same time, the highest priority device can continue while the others back off. Frames are received by all devices, including by the transmitting device. History Development of the CAN bus started in 1983 at Robert Bosch GmbH. The protocol was officially released in 1986 at the Society of Automotive Engineers (SAE) conference in Detroit, Michigan. The first CAN controller chips were introduced by Intel in 1987, and shortly thereafter by Philips. Released in 1991, the Mercedes-Benz W140 was the first produc ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Background Debug Mode Interface
Background debug mode (BDM) interface is an electronic interface that allows debugging of embedded systems. Specifically, it provides in-circuit debugging functionality in microcontrollers. It requires a single wire and specialized electronics in the system being debugged. It appears in many Freescale Semiconductor products. The interface allows a ''Host'' to manage and query a ''target''. Specialized hardware is required in the target device. No special hardware is required in the host; a simple bidirectional I/O pin is sufficient. I/O signals The signals used by BDM to communicate data to and from the target are initiated by the host processor. The host negates the transmission line, and then either * Asserts the line sooner, to output a 1, * Asserts the line later, to output a 0, * Tri-states its output, allowing the target to drive the line. The host can sense a 1 or 0 as an input value. At the start of the next bit time, the host negates the transmission line, and t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Interrupt Handler
In computer systems programming, an interrupt handler, also known as an interrupt service routine or ISR, is a special block of code associated with a specific interrupt condition. Interrupt handlers are initiated by hardware interrupts, software interrupt instructions, or software exceptions, and are used for implementing device drivers or transitions between protected modes of operation, such as system calls. The traditional form of interrupt handler is the hardware interrupt handler. Hardware interrupts arise from electrical conditions or low-level protocols implemented in digital logic, are usually dispatched via a hard-coded table of interrupt vectors, asynchronously to the normal execution stream (as interrupt masking levels permit), often using a separate stack, and automatically entering into a different execution context (privilege level) for the duration of the interrupt handler's execution. In general, hardware interrupts and their handlers are used to handle high-pri ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Program Counter
The program counter (PC), commonly called the instruction pointer (IP) in Intel x86 and Itanium microprocessors, and sometimes called the instruction address register (IAR), the instruction counter, or just part of the instruction sequencer, is a processor register that indicates where a computer is in its program sequence. Usually, the PC is incremented after fetching an instruction, and holds the memory address of (" points to") the next instruction that would be executed. Processors usually fetch instructions sequentially from memory, but ''control transfer'' instructions change the sequence by placing a new value in the PC. These include branches (sometimes called jumps), subroutine calls, and returns. A transfer that is conditional on the truth of some assertion lets the computer follow a different sequence under different conditions. A branch provides that the next instruction is fetched from elsewhere in memory. A subroutine call not only branches but saves the preced ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Stack Pointer
In computer science, a call stack is a stack data structure that stores information about the active subroutines of a computer program. This kind of stack is also known as an execution stack, program stack, control stack, run-time stack, or machine stack, and is often shortened to just "the stack". Although maintenance of the call stack is important for the proper functioning of most software, the details are normally hidden and automatic in high-level programming languages. Many computer instruction sets provide special instructions for manipulating stacks. A call stack is used for several related purposes, but the main reason for having one is to keep track of the point to which each active subroutine should return control when it finishes executing. An active subroutine is one that has been called, but is yet to complete execution, after which control should be handed back to the point of call. Such activations of subroutines may be nested to any level (recursive as a special ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
16-bit
16-bit microcomputers are microcomputers that use 16-bit microprocessors. A 16-bit register can store 216 different values. The range of integer values that can be stored in 16 bits depends on the integer representation used. With the two most common representations, the range is 0 through 65,535 (216 − 1) for representation as an (unsigned) binary number, and −32,768 (−1 × 215) through 32,767 (215 − 1) for representation as two's complement. Since 216 is 65,536, a processor with 16-bit memory addresses can directly access 64 KB (65,536 bytes) of byte-addressable memory. If a system uses segmentation with 16-bit segment offsets, more can be accessed. 16-bit architecture The MIT Whirlwind ( 1951) was quite possibly the first-ever 16-bit computer. It was an unusual word size for the era; most systems used six-bit character code and used a word length of some multiple of 6-bits. This changed with the effort to introduce ASCII, which used a 7-bit code and naturally led ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
