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Display Encode Mode
Video Code Engine (VCE, was earlier referred to as Video Coding Engine, Video Compression Engine or Video Codec Engine in official AMD documentation) is AMD's video encoding application-specific integrated circuit implementing the video codec H.264/MPEG-4 AVC. Since 2012 it was integrated into all of their GPUs and APUs except Oland. VCE was introduced with the Radeon HD 7000 Series on 22 December 2011. VCE occupies a considerable amount of the die surface at the time of its introduction and is not to be confused with AMD's Unified Video Decoder (UVD). As of AMD Raven Ridge (released January 2018), UVD and VCE were succeeded by Video Core Next (VCN). Overview The handling of video data involves computation of data compression algorithms and possibly of video processing algorithms. As the template compression methods shows, lossy video compression algorithms involve the steps: motion estimation (ME), discrete cosine transform (DCT), and entropy encoding (EC). AMD Video Cod ...
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Advanced Micro Devices
Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactured its own processors, the company later outsourced its manufacturing, a practice known as going fabless, after GlobalFoundries was spun off in 2009. AMD's main products include microprocessors, motherboard chipsets, embedded processors, graphics processors, and FPGAs for servers, workstations, personal computers, and embedded system applications. History First twelve years Advanced Micro Devices was formally incorporated by Jerry Sanders, along with seven of his colleagues from Fairchild Semiconductor, on May 1, 1969. Sanders, an electrical engineer who was the director of marketing at Fairchild, had, like many Fairchild executives, grown frustrated with the increasing lack of support, opportunity, and flexibility within th ...
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Application Programming Interface
An application programming interface (API) is a way for two or more computer programs to communicate with each other. It is a type of software interface, offering a service to other pieces of software. A document or standard that describes how to build or use such a connection or interface is called an ''API specification''. A computer system that meets this standard is said to ''implement'' or ''expose'' an API. The term API may refer either to the specification or to the implementation. In contrast to a user interface, which connects a computer to a person, an application programming interface connects computers or pieces of software to each other. It is not intended to be used directly by a person (the end user) other than a computer programmer who is incorporating it into the software. An API is often made up of different parts which act as tools or services that are available to the programmer. A program or a programmer that uses one of these parts is said to ''call'' that ...
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Device Driver
In computing, a device driver is a computer program that operates or controls a particular type of device that is attached to a computer or automaton. A driver provides a software interface to hardware devices, enabling operating systems and other computer programs to access hardware functions without needing to know precise details about the hardware being used. A driver communicates with the device through the computer bus or communications subsystem to which the hardware connects. When a calling program invokes a routine in the driver, the driver issues commands to the device (drives it). Once the device sends data back to the driver, the driver may invoke routines in the original calling program. Drivers are hardware dependent and operating-system-specific. They usually provide the interrupt handling required for any necessary asynchronous time-dependent hardware interface. Purpose The main purpose of device drivers is to provide abstraction by acting as a translator be ...
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AMD Radeon 500 Series
The Radeon 500 series is a series of graphics processors developed by AMD. These cards are based on the fourth iteration of the Graphics Core Next architecture, featuring GPUs based on Polaris 30, Polaris 20, Polaris 11, and Polaris 12 chips. Thus the RX 500 series uses the same microarchitecture and instruction set as its predecessor, while making use of improvements in the manufacturing process to enable higher clock rates. Third-generation GCN chips are produced on a 28 nm CMOS process. Polaris (fourth-generation GCN) chips (except for Polaris 30) are produced on a 14 nm FinFET process, developed by Samsung Electronics and licensed to GlobalFoundries. Polaris 30 chips are produced on a 12 nm FinFET process, developed by Samsung and GlobalFoundries. Chipset table * Supported display standards are: DisplayPort 1.4 HBR, HDMI 2.0b, HDR10 color. * Dual-Link DVI-D and DVI-I at resolutions up to 4096×2304 are also supported, despite ports not being present ...
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AMD Radeon Rx 400 Series
The Radeon 400 series is a series of graphics processors developed by AMD. These cards were the first to feature the Polaris GPUs, using the new 14 nm FinFET manufacturing process, developed by Samsung Electronics and licensed to GlobalFoundries. The Polaris family initially included two new chips in the Graphics Core Next (GCN) family (Polaris 10 and Polaris 11). Polaris implements the 4th generation of the Graphics Core Next instruction set, and shares commonalities with the previous GCN microarchitectures. Naming The RX prefix is used for cards that offer over 1.5 teraflops of performance and 80 GB/s of memory throughput (with memory compression), and achieve at least 60 FPS at 1080p in popular games such as ''Dota 2'' and ''League of Legends''. Otherwise, it will be omitted. Like previous generations, the first numeral in the number refers to the generation (4 in this case) and the second numeral in the number refers to the tier of the card, of which there are six. Tier 4, ...
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AMD Radeon Rx 300 Series
The Radeon 300 series is a series of graphics processors developed by AMD. All of the GPUs of the series are produced in 28 nm format and use the Graphics Core Next (GCN) micro-architecture. The series includes the Fiji and Tonga GPU dies based on AMD's GCN 3 or "Volcanic Islands" architecture, which had originally been introduced with the Tonga based (though cut-down) R9 285 slightly earlier. Some of the cards in the series include the Fiji based flagship AMD Radeon R9 Fury X, cut-down Radeon R9 Fury and small form factor Radeon R9 Nano, which are the first GPUs to feature High Bandwidth Memory (HBM) technology, which AMD co-developed in partnership with SK Hynix. HBM is faster and more power efficient than GDDR5 memory, though also more expensive. However, the remaining GPUs in the series outside the Tonga based R9 380 and R9 380X are based on previous generation GPUs with revised power management, and therefore only feature GDDR5 memory (something Tonga does as well). ...
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High Efficiency Video Coding
High Efficiency Video Coding (HEVC), also known as H.265 and MPEG-H Part 2, is a video compression standard designed as part of the MPEG-H project as a successor to the widely used Advanced Video Coding (AVC, H.264, or MPEG-4 Part 10). In comparison to AVC, HEVC offers from 25% to 50% better data compression at the same level of video quality, or substantially improved video quality at the same bit rate. It supports resolutions up to 8192×4320, including 8K UHD, and unlike the primarily 8-bit AVC, HEVC's higher fidelity Main 10 profile has been incorporated into nearly all supporting hardware. While AVC uses the integer discrete cosine transform (DCT) with 4×4 and 8×8 block sizes, HEVC uses integer DCT and DST transforms with varied block sizes between 4×4 and 32×32. The High Efficiency Image Format (HEIF) is based on HEVC. , HEVC is used by 43% of video developers, and is the second most widely used video coding format after AVC. Concept In most ways, HEVC is an extensi ...
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Puma (microarchitecture)
The Puma Family 16h is a low-power microarchitecture by AMD for its APUs. It succeeds the Jaguar as a second-generation version, targets the same market, and belongs to the same AMD architecture Family 16h. The ''Beema'' line of processors are aimed at low-power notebooks, and ''Mullins'' are targeting the tablet sector. Design The Puma cores use the same microarchitecture as Jaguar, and inherits the design: * Out-of-order execution and Speculative execution, up to 4 CPU cores * Two-way integer execution * Two-way 128-bit wide floating-point and packed integer execution * Integer hardware divider * Puma does not feature clustered multi-thread (CMT), meaning that there are no "modules" * Puma does not feature Heterogeneous System Architecture or zero-copy * 32 KiB instruction + 32 KiB data L1 cache per core * 1–2 MiB unified L2 cache shared by two or four cores * Integrated single channel memory controller supporting 64bit DDR3L * 3.1 mm2 area per core ...
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Jaguar (microarchitecture)
The AMD Jaguar Family 16h is a low-power microarchitecture designed by AMD. It is used in APUs succeeding the Bobcat Family microarchitecture in 2013 and being succeeded by AMD's Puma architecture in 2014. It is two-way superscalar and capable of out-of-order execution. It is used in AMD's Semi-Custom Business Unit as a design for custom processors and is used by AMD in four product families: ''Kabini'' aimed at notebooks and mini PCs, ''Temash'' aimed at tablets, ''Kyoto'' aimed at micro-servers, and the ''G-Series'' aimed at embedded applications. Both the PlayStation 4 and the Xbox One use chips based on the Jaguar microarchitecture, with more powerful GPUs than AMD sells in its own commercially available Jaguar APUs. Design * 32 KiB instruction + 32 KiB data L1 cache per core, L1 cache includes parity error detection * 16-way, 1–2 MiB unified L2 cache shared by two or four cores, L2 cache is protected from errors by the use of error correcting code * Out ...
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Steamroller (microarchitecture)
AMD Steamroller Family 15h is a microarchitecture developed by AMD for AMD APUs, which succeeded Piledriver in the beginning of 2014 as the third-generation Bulldozer-based microarchitecture. Steamroller APUs continue to use two-core modules as their predecessors, while aiming at achieving greater levels of parallelism. Microarchitecture ''Steamroller'' still features two-core modules found in ''Bulldozer'' and ''Piledriver'' designs called clustered multi-thread (CMT), meaning that one module is marketed as a dual-core processor. The focus of ''Steamroller'' is for greater parallelism. Improvements center on independent instruction decoders for each core within a module, 25% more of the maximum width dispatches per thread, better instruction schedulers, improved perceptron branch predictor, larger and smarter caches, up to 30% fewer instruction cache misses, branch misprediction rate reduced by 20%, dynamically resizable L2 cache, micro-operations queue, more internal regist ...
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Piledriver (microarchitecture)
AMD Piledriver Family 15h is a microarchitecture developed by AMD as the second-generation successor to Bulldozer. It targets desktop, mobile and server markets. It is used for the AMD Accelerated Processing Unit (formerly Fusion), AMD FX, and the Opteron line of processors. The changes over Bulldozer are incremental. Piledriver uses the same "module" design. Its main improvements are to branch prediction and FPU/integer scheduling, along with a switch to hard-edge flip-flops to improve power consumption. This resulted in clock speed gains of 8–10% and a performance increase of around 15% with similar power characteristics. FX-9590 is around 40% faster than Bulldozer-based FX-8150, mostly because of higher clock speed. Products based on Piledriver were first released on 15 May 2012 with the AMD Accelerated Processing Unit (APU), code-named Trinity, series of mobile products. APUs aimed at desktops followed in early October 2012 with Piledriver-based FX-series CPUs released l ...
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