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Coffee Lake
Coffee Lake is Intel's codename for its eighth generation Core microprocessor family, announced on September 25, 2017. It is manufactured using Intel's second 14 nm process node refinement. Desktop Coffee Lake processors introduced i5 and i7 CPUs featuring six cores (along with hyper-threading in the case of the latter) and Core i3 CPUs with four cores and no hyperthreading. On October 8, 2018, Intel announced what it branded its ninth generation of Core processors, the Coffee Lake Refresh family. To avoid running into thermal problems at high clock speeds, Intel soldered the integrated heat spreader (IHS) to the CPU die instead of using thermal paste as on the Coffee Lake processors. The generation was defined by another increase of core counts. Coffee Lake is used with the 300-series chipset, and officially does not work with the 100- and 200-series chipset motherboards. Although desktop Coffee Lake processors use the same physical LGA 1151 socket as Skylake and Kaby ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Xeon
Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus. Overview The ''Xeon'' brand has been m ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SSSE3
Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitecture on June 26, 2006 with the "Woodcrest" Xeons. SSSE3 has been referred to by the codenames Tejas New Instructions (TNI) or Merom New Instructions (MNI) for the first processor designs intended to support it. Functionality SSSE3 contains 16 new discrete instructions. Each instruction can act on 64-bit MMX or 128-bit XMM registers. Therefore, Intel's materials refer to 32 new instructions. They include: * Twelve instructions that perform horizontal addition or subtraction operations. * Six instructions that evaluate absolute values. * Two instructions that perform multiply-and-add operations and speed up the evaluation of dot products. * Two instructions that accelerate packed integer multiply operations and produce integer values wi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Whiskey Lake (microprocessor)
Whiskey Lake is Intel's codename for a family of third 14 nm generation Skylake low-power mobile processors. Intel announced Whiskey Lake on August 28, 2018. Changes * 14++ nm process, same as Coffee Lake * Increased turbo clocks (300–600 MHz) * 14 nm PCH * Native USB 3.1 gen 2 support (10 Gbit/s) * Integrated Wi-Fi 802.11ac 160 MHz / WiFi 5 and Bluetooth 5.0 * Intel Optane Memory support List of Whiskey Lake CPUs Mobile processors The TDP for these CPUs is 15 W, but is configurable. Core i5-8365U and i7-8665U support Intel vPro Technology Pentium Gold and Celeron CPUs lack AVX2 Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bri ... support. References {{IntelProcessorRoadmap Intel microarchitectures Intel x86 microprocessors X86 micro ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Cannon Lake (microprocessor)
Cannon Lake (formerly Skymont) is Intel's codename for the 10 nm die shrink of the Kaby Lake microarchitecture. As a die shrink, Cannon Lake is a new ''process'' in Intel's process-architecture-optimization execution plan as the next step in semiconductor fabrication. Cannon Lake CPUs are the first mainstream CPUs to include the AVX-512 instruction set. Prior to Cannon Lake's launch, Intel launched another 14 nm process refinement with the codename Coffee Lake. The successor of Cannon Lake is Ice Lake, powered by the Sunny Cove microarchitecture, which represents the ''architecture'' phase in the ''process-architecture-optimization'' model. Design history and features Cannon Lake was initially expected to be released in 2015/2016, but the release was pushed back to 2018. Intel demonstrated a laptop with an unknown Cannon Lake CPU at CES 2017 and announced that Cannon Lake based products would be available in 2018 at the earliest. At CES 2018 Intel announced tha ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Kaby Lake
Kaby Lake is Intel's codename for its seventh generation Core microprocessor family announced on August 30, 2016. Like the preceding Skylake, Kaby Lake is produced using a 14 nanometer manufacturing process technology. Breaking with Intel's previous " tick–tock" manufacturing and design model, Kaby Lake represents the optimized step of the newer process–architecture–optimization model. Kaby Lake began shipping to manufacturers and OEMs in the second quarter of 2016, and mobile chips have started shipping while Kaby Lake (desktop) chips were officially launched in January 2017. In August 2017, Intel announced Kaby Lake Refresh ( Kaby Lake R) marketed as the 8th generation mobile CPUs, breaking the long cycle where architectures matched the corresponding generations of CPUs. Skylake was anticipated to be succeeded by the 10 nanometer Cannon Lake, but it was announced in July 2015 that Cannon Lake had been delayed until the second half of 2017. In the meantime, Intel re ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pinout
In electronics, a pinout (sometimes written "pin-out") is a cross-reference between the contacts, or ''pins'', of an electrical connector or electronic component, and their functions. "Pinout" now supersedes the term "basing diagram" that was the standard terminology used by the manufacturers of vacuum tubes and the RMA. The RMA started its standardization in 1934, collecting and correlating tube data for registration at what was to become the EIA. The EIA (Electronic Industries Alliance) now has many sectors reporting to it, and sets what are known as EIA standards where all registered pinouts and registered jacks can be found. Purpose The functions of contacts in electrical connectors, be they power- or signaling-related, must be specified in order for connectors to be interchangeable. When connected, each contact of a connector must mate with the contact on the other connector that has the same function. If contacts of disparate functions are allowed to make contact, the conn ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
LGA 1151
LGA 1151, also known as Socket H4, zero insertion force flip-chip land grid array (LGA) socket for Intel desktop processors which comes in two distinct versions: the first revision which supports both Intel's Skylake and Kaby Lake CPUs, and the second revision which supports Coffee Lake CPUs exclusively. LGA 1151 is designed as a replacement for the LGA 1150 (known as ''Socket H3''). LGA 1151 has 1151 protruding pins to make contact with the pads on the processor. The Fully Integrated Voltage Regulator, i.e. a voltage regulator which integrated on the CPU's die, introduced with Haswell and Broadwell, has again been moved to the motherboard. Most motherboards for the first revision of the socket support solely DDR4 memory, a lesser number support DDR3(L) memory, and the least number have slots for both DDR4 or DDR3(L) but only one memory type can be installed. Some have UniDIMM support, enabling either type of memory to be placed in the same DIMM, rather than having ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel VT-d
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-assisted virtualization capabilities while attaining reasonable performance. In 2005 and 2006, both Intel ( VT-x) and AMD (AMD-V) introduced limited hardware virtualization support that allowed simpler virtualization software but offered very few speed benefits. Greater hardware support, which allowed substantial speed improvements, came with later processor models. Software-based virtualization The following discussion focuses only on virtualization of the x86 architecture protected mode. In protected mode the operating system kernel runs at a higher privilege such as ring 0, and applications at a lower privilege such as ring 3. In software-based virtualization, a host OS has direct access to hardware while the guest OSs have limited ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel VT-x
x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-assisted virtualization capabilities while attaining reasonable performance. In 2005 and 2006, both Intel ( VT-x) and AMD (AMD-V) introduced limited hardware virtualization support that allowed simpler virtualization software but offered very few speed benefits. Greater hardware support, which allowed substantial speed improvements, came with later processor models. Software-based virtualization The following discussion focuses only on virtualization of the x86 architecture protected mode. In protected mode the operating system kernel runs at a higher privilege such as ring 0, and applications at a lower privilege such as ring 3. In software-based virtualization, a host OS has direct access to hardware while the guest OSs have limited ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Software Guard Extensions
Intel Software Guard Extensions (SGX) is a set of security-related instruction codes that are built into some Intel central processing units (CPUs). They allow user-level and operating system code to define protected private regions of memory, called ''enclaves''. SGX is designed to be useful for implementing secure remote computation, secure web browsing, and digital rights management (DRM). Other applications include concealment of proprietary algorithms and of encryption keys. SGX involves encryption by the CPU of a portion of memory (the ''enclave''). Data and code originating in the enclave are decrypted on the fly ''within'' the CPU, protecting them from being examined or read by other code, including code running at higher privilege levels such the operating system and any underlying hypervisors. While this can mitigate many kinds of attacks, it does not protect against side-channel attacks. A pivot by Intel in 2021 resulted in the deprecation of SGX from the 11th and 1 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Transactional Synchronization Extensions
Transactional Synchronization Extensions (TSX), also called Transactional Synchronization Extensions New Instructions (TSX-NI), is an extension to the x86 instruction set architecture (ISA) that adds hardware transactional memory support, speeding up execution of multi-threaded software through lock elision. According to different benchmarks, TSX/TSX-NI can provide around 40% faster applications execution in specific workloads, and 4–5 times more database transactions per second (TPS). TSX/TSX-NI was documented by Intel in February 2012, and debuted in June 2013 on selected Intel microprocessors based on the Haswell microarchitecture. Haswell processors below 45xx as well as R-series and K-series (with unlocked multiplier) SKUs do not support TSX/TSX-NI. In August 2014, Intel announced a bug in the TSX/TSX-NI implementation on current steppings of Haswell, Haswell-E, Haswell-EP and early Broadwell CPUs, which resulted in disabling the TSX/TSX-NI feature on affected CPU ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Trusted Execution Technology
Intel Trusted Execution Technology (Intel TXT, formerly known as LaGrande Technology) is a computer hardware technology whose primary goals are: * Attestation of the authenticity of a platform and its operating system. * Assuring that an authentic operating system starts in a trusted environment, which can then be considered trusted. * Provision of a trusted operating system with additional security capabilities not available to an unproven one. Intel TXT uses a Trusted Platform Module (TPM) and cryptographic techniques to provide measurements of software and platform components so that system software as well as local and remote management applications may use those measurements to make trust decisions. It complements Intel Management Engine. This technology is based on an industry initiative by the Trusted Computing Group (TCG) to promote safer computing. It defends against software-based attacks aimed at stealing sensitive information by corrupting system or BIOS code, or mod ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
