Access Registers
In IBM terminology, an Access Register (AR) is a hardware register in ESA/370 and later mainframe instruction set architectures. Access registers work in conjunction with the general purpose registers, giving a program transparent access to up to sixteen 2 GB address spaces simultaneously. ARs were introduced with ESA/370 in 1988, and supported by the MVS/ESA operating system. In IBM System/360 architecture The IBM System/360 architecture is the model independent architecture for the entire S/360 line of mainframe computers, including but not limited to the instruction set architecture. The elements of the architecture are documented in the ''IB ... all instructions address memory by specifying a 12-bit offset (4096 bytes) from a value in a "base register" with optional indexing. Originally addresses occupied the low-order 24 bits of a base register, allowing a program to access up to 16 MB. System/370-XA extended the architecture to allow 31-bit addressing an ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Hardware Register
In digital electronics, especially computing, hardware registers are circuits typically composed of flip-flops, often with many characteristics similar to memory, such as: * Using an memory or port address to select a particular register in a manner similar to a memory address. * the ability to read or write one or multiple bits at a time. Their distinguishing characteristic, however, is that they also have special hardware-related functions beyond those of ordinary memory. So, depending on the point of view, hardware registers are like memory with additional hardware-related functions; or, memory circuits are like hardware registers that just store data. Hardware registers are used in the interface between software and peripherals. Software writes them to send information to the device, and reads them to get information from the device. Some hardware devices also include registers that are not visible to software, for their internal use. Depending on their complexity, moder ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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ESA/370
IBM Enterprise Systems Architecture is an instruction set architecture introduced by IBM as Enterprise Systems Architecture/370 (ESA/370) in 1988. It is based on the IBM System/370-XA architecture. It extended the dual-address-space mechanism introduced in later IBM System/370 models by adding a new mode in which general-purpose registers 1–15 are each associated with an access register referring to an address space, with instruction operands whose address is computed with a given general-purpose register as a base register will be in the address space referred to by the corresponding address register. The later Enterprise Systems Architecture/390 (ESA/390), introduced in 1990, added a facility to allow device descriptions to be read using channel commands and, in later models, added instructions to perform IEEE 754 floating-point operations and increased the number of floating-point registers from 4 to 16. Enterprise Systems Architecture is essentially a 32-bit architectur ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Instruction Set Architectures
In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ''implementation'' of that ISA. In general, an ISA defines the supported instructions, data types, registers, the hardware support for managing main memory, fundamental features (such as the memory consistency, addressing modes, virtual memory), and the input/output model of implementations of the ISA. An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the characteristics of that implementation, providing binary compatibility between implementations. This enables multiple implementations of an ISA that differ in characteristics such as performance, physical size, and monetary cost (among other things), but t ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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General Purpose Register
A processor register is a quickly accessible location available to a computer's processor. Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. In computer architecture, registers are typically addressed by mechanisms other than main memory, but may in some cases be assigned a memory address e.g. DEC PDP-10, ICT 1900. Almost all computers, whether load/store architecture or not, load items of data from a larger memory into registers where they are used for arithmetic operations, bitwise operations, and other operations, and are manipulated or tested by machine instructions. Manipulated items are then often stored back to main memory, either by the same instruction or by a subsequent one. Modern processors use either static or dynamic random-access memory (RAM) as main memory, with the latter usually accessed via one or more cache levels. Processor registers are normally ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Address Space
In computing, an address space defines a range of discrete addresses, each of which may correspond to a network host, peripheral device, disk sector, a memory cell or other logical or physical entity. For software programs to save and retrieve stored data, each datum must have an address where it can be located. The number of address spaces available depends on the underlying address structure, which is usually limited by the computer architecture being used. Often an address space in a system with virtual memory corresponds to a highest level translation table, e.g., a segment table in IBM System/370. Address spaces are created by combining enough uniquely identified qualifiers to make an address unambiguous within the address space. For a person's physical address, the ''address space'' would be a combination of locations, such as a neighborhood, town, city, or country. Some elements of a data address space may be the same, but if any element in the address is different, ad ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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MVS/ESA
Multiple Virtual Storage, more commonly called MVS, is the most commonly used operating system on the System/370, System/390 and IBM Z IBM mainframe computers. IBM developed MVS, along with OS/VS1 and SVS, as a successor to OS/360. It is unrelated to IBM's other mainframe operating system lines, e.g., VSE, VM, TPF. Overview First released in 1974, MVS was extended by program products with new names multiple times, retaining the term MVS in the nomenclature: * first to MVS/SE (MVS/System Extensions),some print media used the singular, MVS/System Extension: Computerworld, 15 Dec 1980 - Page 5; 26 June 1978 - Page 8 * next to MVS/SP (MVS/System Product) Version 1, * next to MVS/XA (MVS/eXtended Architecture), * next to MVS/ESA (MVS/Enterprise Systems Architecture), and then extended * to OS/390 for the System/390 systems, and * finally to z/OS (when 64-bit support was added with the zSeries models). IBM added UNIX support (originally called OpenEdition MVS) in MVS/SP ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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IBM System/360 Architecture
The IBM System/360 architecture is the model independent architecture for the entire S/360 line of mainframe computers, including but not limited to the instruction set architecture. The elements of the architecture are documented in the ''IBM System/360 Principles of Operation'' and the ''IBM System/360 I/O Interface Channel to Control Unit Original Equipment Manufacturers' Information'' manuals. Features The System/360 architecture provides the following features: * 16 32-bit general-purpose registers * 4 64-bit floating-point registers * 64-bit processor status register (PSW), which includes a 24-bit instruction address * 24-bit (16 MB) byte-addressable memory space * Big-endian byte/word order * A ''standard instruction set'', including fixed-point binary arithmetic and logical instructions, present on all System/360 models (except the Model 20, see below). ** A ''commercial instruction set'', adding decimal arithmetic instructions, is optional on some models, as ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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IBM System/370
The IBM System/370 (S/370) is a range of IBM mainframe computers announced as the successors to the IBM System/360, System/360 family on June 30, 1970. The series mostly maintains backward compatibility with the S/360, allowing an easy migration path for customers; this, plus improved performance, were the dominant themes of the product announcement. Early 370 systems differed from the 360 largely in their internal circuitry, moving from the Solid Logic Technology hybrid integrated circuits containing separate transistors to more modern monolithic integrated circuits containing multiple transistors per integrated circuit, which IBM referred to as Monolithic System Technology, or MST. The higher density packaging allowed several formerly optional features from the 360 line to be included as standard features of the machines, floating-point support for instance. The 370 also added a small number of new instructions. At the time of its introduction, the development of virtual mem ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |
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Address Register
A processor register is a quickly accessible location available to a computer's processor. Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. In computer architecture, registers are typically addressed by mechanisms other than main memory, but may in some cases be assigned a memory address e.g. DEC PDP-10, ICT 1900. Almost all computers, whether load/store architecture or not, load items of data from a larger memory into registers where they are used for arithmetic operations, bitwise operations, and other operations, and are manipulated or tested by machine instructions. Manipulated items are then often stored back to main memory, either by the same instruction or by a subsequent one. Modern processors use either static or dynamic random-access memory (RAM) as main memory, with the latter usually accessed via one or more cache levels. Processor registers are normally ... [...More Info...]       [...Related Items...]     OR:     [Wikipedia]   [Google]   [Baidu]   |