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31-bit Computing
In computer architecture, 31-bit integers, memory addresses, or other data units are those that are 31 bits wide. In 1983, IBM introduced 31-bit addressing in the System/370-XA mainframe architecture as an upgrade to the 24-bit physical and virtual, and transitional 24-bit-virtual/ 26-bit physical, addressing in System/370. This enhancement allowed address spaces to be 128 times larger, permitting programs to address memory above 16  MB (referred to as "above the line"). Support for COBOL, FORTRAN and later on Linux/390 was included. In the early 1980s, the Motorola 68012 was introduced; it had 32-bit data and address registers, as did the Motorola 68010, but instead of providing the lower 24 bits of an address, it did so for all but bit 30 on the address pins. 31-bit computer The Librascope LGP-30 was an early off-the-shelf computer. The LGP-30 was first manufactured in 1956, at a retail price of $47,000, . It was a binary, 31-bit word computer with a 4096-word d ...
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LGP-30
The LGP-30, standing for Librascope General Purpose and then Librascope General Precision, is an early off-the-shelf computer. It was manufactured by the Librascope company of Glendale, California (a division of General Precision Inc.), and sold and serviced by the Royal Precision Electronic Computer Company, a joint venture with the Royal McBee division of the Royal Typewriter Company. The LGP-30 was first manufactured in 1956, at a retail price of $47,000, . The LGP-30 was commonly referred to as a desk computer. Its height, width, and depth, excluding the typewriter shelf, was . It weighed about , and was mounted on sturdy casters which facilitated moving the unit. Design The primary design consultant for the Librascope computer was Stan Frankel, a Manhattan Project veteran and one of the first programmers of ENIAC, assisted by James Cass, at the time a graduate student at Caltech. They designed a usable computer with a minimal amount of hardware. The single addre ...
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Tagged Architecture
In computer science, a tagged architecture is a type of computer architecture where every word (data type), word of memory constitutes a tagged union, being divided into a number of bits of data, and a ''tag'' section that describes the type of the data: how it is to be interpreted, and, if it is a reference, the type of the object that it points to. Precursors Some early systems use tagging of data in memory but do not have all of the characteristics now consider to be part of tagged architectures. RCA 601 The RCA 601 has a 3-bit tag register and a 3-bit tag for every 24-bit half-word. Every instruction can request a test for equal or unequal tag, and cause a maskable interrupt if the specified match fails. There is no architectural connection between the tag and the contents of the half-word; it is strictly determined by the software. Burroughs B5000, B5500 and B5700 The Burroughs B5000, B5500 and B5700 have 48-bit words with no appended tag field. However, while there are ...
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16-bit Computing
16-bit microcomputers are microcomputers that use 16-bit microprocessors. A 16-bit register can store 216 different values. The range of integer values that can be stored in 16 bits depends on the integer representation used. With the two most common representations, the range is 0 through 65,535 (216 − 1) for representation as an ( unsigned) binary number, and −32,768 (−1 × 215) through 32,767 (215 − 1) for representation as two's complement. Since 216 is 65,536, a processor with 16-bit memory addresses can directly access 64 KB (65,536 bytes) of byte-addressable memory. If a system uses segmentation with 16-bit segment offsets, more can be accessed. As of 2025, 16-bit microcontrollers cost well under a dollar (similar to close in price legacy 8-bit); the cheapest 16-bit microcontrollers cost less than other types including any 8-bit (and are more powerful, and easier to program generally), making 8-bit legacy microcontrollers not worth it for new applications ...
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Z/Architecture
z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit complex instruction set computer (CISC) instruction set architecture, implemented by its mainframe computers. IBM introduced its first z/Architecture-based system, the z900, in late 2000. Subsequent z/Architecture systems include the IBM z800, z990, z890, System z9, System z10, zEnterprise 196, zEnterprise 114, zEC12, zBC12, z13, z14, z15, z16, and z17. z/Architecture retains backward compatibility with previous 32-bit-data/31-bit-addressing architecture ESA/390 and its predecessors back to the 32-bit-data/24-bit-addressing System/360. The IBM z13 is the last z Systems server to support running an operating system in ESA/390 architecture mode. However, all 24-bit and 31-bit problem-state application programs originally written to run on the ESA/390 architecture will be unaffected by this change. Features z/Architecture includes almost all of the features of ESA/390, and a ...
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IBM Enterprise Systems Architecture
IBM Enterprise Systems Architecture is an instruction set architecture introduced by IBM as Enterprise Systems Architecture/370 (ESA/370) in 1988. It is based on the IBM System/370-XA architecture. It extended the dual-address-space mechanism introduced in later IBM System/370 models by adding a new mode in which general-purpose registers 1–15 are each associated with an access register referring to an address space, with instruction operands whose address is computed with a given general-purpose register as a base register will be in the address space referred to by the corresponding address register. The later Enterprise Systems Architecture/390 (ESA/390), introduced in 1990, added a facility to allow device descriptions to be read using channel commands and, in later models, added instructions to perform IEEE 754 floating-point operations and increased the number of floating-point registers from 4 to 16. Enterprise Systems Architecture is essentially a 32-bit architectu ...
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IBM System/370-XA
IBM System/370-XA is an instruction set architecture introduced by IBM in 1983 for the IBM 308X processors. It extends the IBM System/370 architecture to support 31-bit virtual and physical addresses, and includes a redesigned I/O architecture. 31-bit virtual addressing In the System/360, other than the 360/67, and System/370 architectures, the general-purpose registers were 32 bits wide, the machine did 32-bit arithmetic operations, and addresses were always stored in 32-bit words, so the architecture was considered 32-bit, but the machines ignored the top 8 bits of the address resulting in 24-bit addressing. Much of System/360's and System/370's large installed code base relied on a 24-bit logical address In computing, a logical address is the address at which an item ( memory cell, storage element, network host) appears to reside from the perspective of an executing application program. A logical address may be different from the physical addr ...; In particula ...
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General-purpose Register
A processor register is a quickly accessible location available to a computer's processor. Registers usually consist of a small amount of fast storage, although some registers have specific hardware functions, and may be read-only or write-only. In computer architecture, registers are typically addressed by mechanisms other than main memory, but may in some cases be assigned a memory address e.g. DEC PDP-10, ICT 1900. Almost all computers, whether load/store architecture or not, load items of data from a larger memory into registers where they are used for arithmetic operations, bitwise operations, and other operations, and are manipulated or tested by machine instructions. Manipulated items are then often stored back to main memory, either by the same instruction or by a subsequent one. Modern processors use either static or dynamic random-access memory (RAM) as main memory, with the latter usually accessed via one or more cache levels. Processor registers are norm ...
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IBM System/360 Model 67
IBM mainframes are large computer systems produced by IBM since 1952. During the 1960s and 1970s, IBM dominated the computer market with the 7000 series and the later System/360, followed by the System/370. Current mainframe computers in IBM's line of business computers are developments of the basic design of the System/360. First and second generation From 1952 into the late 1960s, IBM manufactured and marketed several large computer models, known as the IBM 700/7000 series. The first-generation 700s were based on vacuum tubes, while the later, second-generation 7000s used transistors. These machines established IBM's dominance in electronic data processing ("EDP"). IBM had two model categories: one (701, 704, 709, 7030, 7090, 7094, 7040, 7044) for engineering and scientific use, and one (702, 705, 705-II, 705-III, 7080, 7070, 7072, 7074, 7010) for commercial or data processing use. The two categories, scientific and commercial, generally used common peripherals but had co ...
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System/360
The IBM System/360 (S/360) is a family of mainframe computer systems announced by IBM on April 7, 1964, and delivered between 1965 and 1978. System/360 was the first family of computers designed to cover both commercial and scientific applications and a complete range of applications from small to large. The design distinguished between computer architecture, architecture and implementation, allowing IBM to release a suite of compatible designs at different prices. All but the only partially compatible IBM System/360 Model 44, Model 44 and the most expensive systems use microcode to implement the instruction set, featuring 8-bit computing, 8-bit byte addressing and fixed-point binary, fixed-point decimal and IBM hexadecimal floating-point, hexadecimal floating-point arithmetic, floating-point calculations. The System/360 family introduced IBM's Solid Logic Technology (SLT), which packed more transistors onto a circuit card, allowing more powerful but smaller computers. System/36 ...
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Bit-serial Architecture
In computer architecture, bit-serial architectures send data one bit at a time, along a single wire, in contrast to Parallel transmission, bit-parallel word (computer architecture), word architectures, in which data values are sent all bits or a word at once along a group of wires. All digital computers built before 1951, and most of the early massively parallel (computing), massive parallel processing machines used a bit-serial architecture—they were serial computers. Bit-serial architectures were developed for digital signal processing in the 1960s through 1980s, including efficient structures for bit-serial multiplication and accumulation. The HP Nut processor used in many Hewlett-Packard calculators operated bit-serially. Assuming N is an arbitrary integer number, N serial processors will often take less FPGA area and have a higher total performance than a single N-bit parallel processor. See also * Serial computer * 1-bit computing * Bit banging * Bit slicing * BKM a ...
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Diode Logic
Diode logic (or diode-resistor logic) constructs And (logic), AND and Or (logic), OR logic gates with diodes and Resistor, resistors. An active device (vacuum tubes with control grids in History of computing hardware, early electronic computers, then transistors in diode–transistor logic) is additionally required to provide Inverter (logic gate), logical inversion (NOT) for functional completeness and Amplifier, amplification for voltage ''level restoration'', which diode logic alone can't provide. Since voltage levels weaken with each diode logic stage, multiple stages can't easily be cascaded, limiting diode logic's usefulness. However, diode logic has the advantage of utilizing only cheap passive components. Background Logic gates Logic gates evaluate Boolean algebra, typically using electronic switches controlled by logical inputs connected in Series and parallel circuits, parallel or series. Diode logic can ''only'' implement OR and AND, because Inverter (logic gate), ...
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