Topic summary
REX prefix
The REX prefix (from "register extensions") and REX coding scheme was introduced as part of AMD's x86-64instruction set architecture that extended Intel's IA-32 instruction set architecture for microprocessors from Intel, AMD and others.
It provides additional space for encoding 64-bit addressing modes and additional registers present in the x86-64 architecture.
The one-byte REX prefix can be added to new and existing instructions. It provides 4 bits of payload in total and allows addressing 16 registers.
A two-byte REX2 prefix was proposed by Intel's Advanced Performance Extensions in 2023 that would offer 8 bits of payload and allow addressing 32 registers.