Low Pin Count

The Low Pin Count (LPC) bus is a computer bus used on IBM-compatiblepersonal computers to connect low-bandwidth devices to the CPU, such as the BIOS ROM (BIOS ROM was moved to the Serial Peripheral Interface (SPI) bus in 2006), "legacy" I/O devices (integrated into Super I/O, embedded controller, CPLD, and/or IPMI chip), and Trusted Platform Module (TPM). "Legacy" I/O devices usually include serial and parallel ports, PS/2keyboard, PS/2 mouse, and floppy disk controller.

Most PC motherboards with an LPC bus have either a Platform Controller Hub (PCH) or a southbridge chip, which acts as the host and controls the LPC bus. All other devices connected to the physical wires of the LPC bus are peripherals.