Branch delay slot

Implementations

Branch delay slots are found mainly in DSP architectures and older RISC architectures. MIPS, PA-RISC (delayed or non-delayed branch can be specified), ETRAX CRIS, SuperH (unconditional branch instructions have one delay slot), Am29000, Intel i860 (unconditional branch instructions have one delay slot), MC88000 (delayed or non-delayed branch can be specified), and SPARC are RISC architectures that each have a single branch delay slot; PowerPC, ARM, Alpha, V850, and RISC-V do not have any. DSP architectures that each have a single branch delay slot include μPD77230 and the VS DSP. The SHARC DSP and MIPS-X use a double branch delay slot; such a processor will execute a pair of instructions following a branch instruction before the branch takes effect. Both TMS320C3x and TMS320C4x use a triple branch delay slot. The TMS320C4x has both non-delayed and delayed branches.