32 nm process

The "32 nm" node is the step following the "45 nm" process in CMOS (MOSFET) semiconductor device fabrication. "32-nanometre" refers to the average half-pitch (i.e., half the distance between identical features) of a memory cell at this technology level.

Toshiba produced commercial 32GiBNAND flash memory chips with the "32nm" process in 2009. Intel and AMD produced commercial microchips using the "32 nm" process in the early 2010s. IBM and the Common Platform also developed a "32 nm" high-κ metal gate process. Intel began selling its first "32 nm" processors using the Westmere architecture on 7 January 2010.

Since at least 1997, "process nodes" have been named purely on a marketing basis, and have no relation to the dimensions on the integrated circuit; neither gate length, nor metal pitch, nor gate pitch on a "32nm" device is thirty-two nanometers.

The "28 nm" node is an intermediate half-node die shrink appeared in production in 2010. It requires twice the number of design rules for ensuring reliability in manufacturing as "80 nm". According to a 2016 presentation by Sophie Wilson, 28 nm has the lowest cost per logic gate and has slowly risen since then. TSMC has offered "28 nm" production using high-K metal gate process technology. GlobalFoundries offered "28SLPe" ("28 nm Super Low Power").

The successor to "32 nm" was "22 nm", per the International Technology Roadmap for Semiconductors. Intel began mass production of "22 nm" semiconductors in late 2011, and announced the release of its first commercial "22 nm" devices in April 2012. TSMC bypassed "32nm", jumping from "40nm" in 2008 to "28nm" in 2011.