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The R800 is the
central processing unit A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, an ...
used in the MSX Turbo-R home computer. The R800 was designed by
ASCII Corporation was a Japanese publishing company based in Chiyoda, Tokyo. It became a subsidiary of Kadokawa Group Holdings in 2004, and merged with another Kadokawa subsidiary MediaWorks on April 1, 2008, becoming ASCII Media Works. The company publishe ...
of Japan and built by Mitsui & Co The goal was a modern and pipelined CPU binary compatible with the Z80, and therefore with MSX software, while also maintaining
compatibility Compatibility may refer to: Computing * Backward compatibility, in which newer devices can understand data generated by older devices * Compatibility card, an expansion card for hardware emulation of another device * Compatibility layer, compon ...
with older MSX Z80-based hardware.


Compatibility

During the development of the MSX Turbo R, ASCII Corporation considered various processors, both compatible and incompatible with the Z80, as candidates. At that time, Kazuya Kishioka , a company employee, was researching and developing an ASIC that was a high-speed version of the Z80 and largely customized for the MSX architecture. For software compatibility with older MSX software, the R800 uses the same
instruction set In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called a ...
as the Z80, with only minor but useful additions, such as 8x8-bit and 16x16-bit multiplication instructions called MULUB (
8-bit In computer architecture, 8-bit integers or other data units are those that are 8 bits wide (1 octet). Also, 8-bit central processing unit (CPU) and arithmetic logic unit (ALU) architectures are those that are based on registers or data buses of ...
), and MULUW (
16-bit 16-bit microcomputers are microcomputers that use 16-bit microprocessors. A 16-bit register can store 216 different values. The range of integer values that can be stored in 16 bits depends on the integer representation used. With the two mos ...
). Also, many of the undocumented Z80 instructions were made official, including all the
opcode In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the opera ...
s for instructions dealing with IX and IY as 8-bit registers (IXH, IXL, IYH, IYL). As the R800 is not based directly on the Z80, but stems from the Z800 family, it lacks some of the other undocumented Z80 features. For instance, the undocumented flags represented in bits 3 and 5 of the F register don't assume the same values as in Z80 (causing it to fail ZEXALL tests) and the undocumented opcode often called SLL is just an alias of the SLA instruction.


Hardware changes

Being a much newer design, the R800 implementation was quite different from the old Z80. The changes were similar to the Z800, Z280,
Z380 The Z380 and Z382 are Zilog 16-bit/ 32-bit processor from 1994.https://www.zilog.com/docs/datacomm/pb0075.pdf It is Z80 compatible, but it was released much later than its competitors (the Intel 386 and Motorola 68020) and as a result was never a ...
and eZ80 lines of Z80 compatible processors. The original Z80 uses an unusual 4-bit ALU hardware internally, a solution actually able to compete with similar CPUs using full hardwired 8-bit ALU logic (such as its immediate precursor, the
Intel 8080 The Intel 8080 (''"eighty-eighty"'') is the second 8-bit microprocessor designed and manufactured by Intel. It first appeared in April 1974 and is an extended and enhanced variant of the earlier 8008 design, although without binary compati ...
). However, the R800 designers implemented a full 16-bit
ALU ALU, Alu or alu may refer to: Computing and science ;Computing *Arithmetic logic unit, a digital electronic circuit ;Biology * Alu sequence, a type of short stretch of DNA *'' Arthrobacter luteus'', a bacterium Organizations * Abraham Lincoln ...
in order to keep up with its more pipelined execution. Instructions like ADD HL,BC that takes 11 clock cycles on the Z80 can in some situations execute in as little as one bus cycle (1-2 clocks) on the R800, due to the degree of pipelining made possible by this full width ALU. The maximum CPU clock speed used on this new MSX was 14.32 MHz—four times as fast as the original 3.57 MHz speed used in the older MSX, while the bus clock was increased to 7.16 MHz. The data bus remained 8-bit to maintain compatibility with old hardware.


Fetching opcodes

Additional changes were made in the way the CPU fetches
opcode In computing, an opcode (abbreviated from operation code, also known as instruction machine code, instruction code, instruction syllable, instruction parcel or opstring) is the portion of a machine language instruction that specifies the opera ...
s. The original Z80 uses two cycles to fetch a simple instruction like OR A, plus two cycles for refresh. An additional waitstate is issued on the MSX architecture. A review of the fetch mechanism in a typical MSX environment helps in explaining the R800: *Z80, cycle 1: set the higher 8-bits of address *Z80, cycle 2: set the lower 8-bits of address *Z80, cycle 3: waitstate *Z80, cycle 4: refresh, part 1 *Z80, cycle 5: refresh, part 2 Since most implementations of MSX use RAM disposed in a 256×256 bytes block, two cycles are required to set the address for the fetch. The R800 avoids this by remembering the last known state of the higher 8-bits. If the next instruction is in the same 256-byte boundaries, the higher 8-bits are not set, and a cycle is saved. However, on the Z80, the refresh cycles destroy the information on the higher bits, so a workaround was needed. The solution used in the R800 was to refresh entire blocks of RAM, instead of refreshing one line of RAM on each instruction issued. Each 30
μs A microsecond is a unit of time in the International System of Units (SI) equal to one millionth (0.000001 or 10−6 or ) of a second. Its symbol is μs, sometimes simplified to us when Unicode is not available. A microsecond is equal to 1000 ...
, the CPU is halted for 4μs, this time is used to refresh a block of the RAM. Since there's no refresh in between fetch instructions, and the waitstate is removed due to faster RAM chips, simple instructions can be issued using only one cycle. This cycle would be cycle 2 in the Z80 example above; cycle 1 becomes optional, and it's only issued when the program crosses a 256-byte boundary.


External hardware

All this only applies to the fast RAM used on the MSX Turbo-R. External hardware, connected through cartridge slots, uses timings similar to Z80. Not even the internal ROM of Turbo-R is fast enough for this fetch scheme, so additional chips on the Turbo-R can mirror the contents of ROM into RAM, in order to make it run faster.


References


Further reading

{{zilog MSX 8-bit microprocessors