Multi-threshold CMOS (MTCMOS) is a variation of

CMOS Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss ", , ) is a type of MOSFET, metal–oxide–semiconductor field-effect transistor (MOSFET) semiconductor device fabrication, fabrication process that uses complementary an ...

chip technology which has

transistor A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch electrical signals and electric power, power. It is one of the basic building blocks of modern electronics. It is composed of semicondu ...

s with multiple

threshold voltage The threshold voltage, commonly abbreviated as Vth or VGS(th), of a field-effect transistor (FET) is the minimum gate-to-source voltage (VGS) that is needed to create a conducting path between the source and drain terminals. It is an important s ...

s (V_th) in order to optimize delay or power. The V_th of a

MOSFET upright=1.3, Two power MOSFETs in amperes">A in the ''on'' state, dissipating up to about 100 watt">W and controlling a load of over 2000 W. A matchstick is pictured for scale. In electronics, the metal–oxide–semiconductor field- ...

is the gate voltage where an inversion layer forms at the interface between the insulating layer (oxide) and the substrate (body) of the transistor. Low V_th devices switch faster, and are therefore useful on critical delay paths to minimize clock periods. The penalty is that low V_th devices have substantially higher static leakage power. High V_th devices are used on non-critical paths to reduce static leakage power without incurring a delay penalty. Typical high V_th devices reduce static leakage by 10 times compared with low V_th devices. One method of creating devices with multiple threshold voltages is to apply different bias voltages (Vb) to the base or bulk terminal of the transistors. Other methods involve adjusting the

gate oxide The gate oxide is the dielectric layer that separates the metal gate, gate terminal of a MOSFET (metal–oxide–semiconductor field-effect transistor) from the underlying source and drain terminals as well as the conductive channel that connects ...

thickness, gate oxide

dielectric In electromagnetism, a dielectric (or dielectric medium) is an Insulator (electricity), electrical insulator that can be Polarisability, polarised by an applied electric field. When a dielectric material is placed in an electric field, electric ...

constant (material type), or

dopant A dopant (also called a doping agent) is a small amount of a substance added to a material to alter its physical properties, such as electrical or optics, optical properties. The amount of dopant is typically very low compared to the material b ...

concentration in the channel region beneath the gate oxide. A common method of fabricating multi-threshold CMOS involves simply adding additional

photolithography Photolithography (also known as optical lithography) is a process used in the manufacturing of integrated circuits. It involves using light to transfer a pattern onto a substrate, typically a silicon wafer. The process begins with a photosensiti ...

and

ion implantation Ion implantation is a low-temperature process by which ions of one element are accelerated into a solid target, thereby changing the target's physical, chemical, or electrical properties. Ion implantation is used in semiconductor device fabrica ...

steps. For a given fabrication process, the V_th is adjusted by altering the concentration of dopant atoms in the channel region beneath the gate oxide. Typically, the concentration is adjusted by

method. For example,

methods are applied to cover all devices except the p-MOSFETs with photoresist. Ion implantation is then completed, with ions of the chosen dopant type penetrating the gate oxide in areas where no photoresist is present. The photoresist is then stripped. Photolithography methods are again applied to cover all devices except the n-MOSFETs. Another implantation is then completed using a different dopant type, with ions penetrating the gate oxide. The photoresist is stripped. At some point during the subsequent fabrication process, implanted ions are activated by annealing at an elevated temperature. In principle, any number of threshold voltage transistors can be produced. For CMOS having two threshold voltages, one additional photomasking and implantation step is required for each of p-MOSFET and n-MOSFET. For fabrication of normal, low, and high V_th CMOS, four additional steps are required relative to conventional single-V_th CMOS.

Implementation

The most common implementation of MTCMOS for reducing power makes use of sleep transistors. Logic is supplied by a virtual power rail. Low V_th devices are used in the logic where fast switching speed is important. High V_th devices connecting the power rails and virtual power rails are turned on in active mode, off in

sleep mode Sleep mode (or suspend to RAM) is a low power mode for electronic devices such as computers, televisions, and remote controlled devices. These modes save significantly on electrical consumption compared to leaving a device fully on and, upon resu ...

. High V_th devices are used as sleep transistors to reduce static leakage power. The design of the power

switch In electrical engineering, a switch is an electrical component that can disconnect or connect the conducting path in an electrical circuit, interrupting the electric current or diverting it from one conductor to another. The most common type o ...

which turns on and off the

power supply A power supply is an electrical device that supplies electric power to an electrical load. The main purpose of a power supply is to convert electric current from a source to the correct voltage, electric current, current, and frequency to power ...

to the

logic gate A logic gate is a device that performs a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, one that has, for ...

s is essential to low-voltage, high-speed circuit techniques such as MTCMOS. The speed, area, and power of a logic circuit are influenced by the characteristics of the power switch. In a "coarse-grained" approach, high V_th sleep transistors gate the power to entire logic blocks. The sleep signal is de-asserted during active mode, causing the transistor to turn on and provide virtual power (ground) to the low V_th logic. The sleep signal is asserted during

, causing the transistor to turn off and disconnect power (ground) from the low V_th logic. The drawbacks of this approach are that: * logic blocks must be partitioned to determine when a block may be safely turned off (on) * sleep transistors are large and must be carefully sized to supply the current required by the circuit block * an always active (never in sleep mode) power management circuit must be added In a "fine-grained" approach, high V_th sleep transistors are incorporated within every gate. Low V_th transistors are used for the pull-up and pull-down networks, and a high V_th transistor is used to gate the leakage current between the two networks. This approach eliminates problems of logic block partitioning and sleep transistor sizing. However, a large amount of area overhead is added due both to inclusion of additional transistors in every Boolean gate, and in creating a sleep signal distribution tree. An intermediate approach is to incorporate high V_th sleep transistors into threshold gates having more complicated function. Since fewer such threshold gates are required to implement any arbitrary function compared to Boolean gates, incorporating MTCMOS into each gate requires less area overhead. Examples of threshold gates having more complicated function are found with Null Convention Logic (NCL) and Sleep Convention Logic (SCL). Some art is required to implement MTCMOS without causing glitches or other problems.

References

{{DEFAULTSORT:Multi-Threshold Cmos Electronic design Digital electronics Logic families