The z14 is a

microprocessor A microprocessor is a computer processor (computing), processor for which the data processing logic and control is included on a single integrated circuit (IC), or a small number of ICs. The microprocessor contains the arithmetic, logic, a ...

made by

IBM International Business Machines Corporation (using the trademark IBM), nicknamed Big Blue, is an American Multinational corporation, multinational technology company headquartered in Armonk, New York, and present in over 175 countries. It is ...

for their z14

mainframe computer A mainframe computer, informally called a mainframe or big iron, is a computer used primarily by large organizations for critical applications like bulk data processing for tasks such as censuses, industry and consumer statistics, enterprise ...

s, announced on July 17, 2017. Manufactured at

GlobalFoundries GlobalFoundries Inc. is a multinational semiconductor contract manufacturing and design company located in the Cayman Islands and headquartered in Malta, New York. Created by the divestiture of the manufacturing arm of AMD in March 2009, the ...

' East Fishkill, New York fabrication plant. IBM stated that it is the world's fastest microprocessor by

clock rate Clock rate or clock speed in computing typically refers to the frequency at which the clock generator of a processor can generate pulses used to synchronize the operations of its components. It is used as an indicator of the processor's s ...

at 5.2 GHz, with a 10% increased performance per core and 30% for the whole chip compared to its predecessor the z13.

Description

The Processor Unit chip (PU chip) has an area of 696 mm² (25.3 × 27.5 mm) and consists of 6.1 billion

transistor A transistor is a semiconductor device used to Electronic amplifier, amplify or electronic switch, switch electrical signals and electric power, power. It is one of the basic building blocks of modern electronics. It is composed of semicondu ...

s. It is fabricated using GlobalFoundries' 14 nm

FinFET A fin field-effect transistor (FinFET) is a multigate device, a MOSFET (metal–oxide–semiconductor field-effect transistor) built on a substrate where the gate is placed on two, three, or four sides of the channel or wrapped around the chann ...

silicon on insulator In semiconductor manufacturing, silicon on insulator (SOI) technology is fabrication of silicon semiconductor devices in a layered silicon–insulator–silicon substrate, to reduce parasitic capacitance within the device, thereby improving perf ...

fabrication process Semiconductor device fabrication is the process used to manufacture semiconductor devices, typically integrated circuits (ICs) such as microprocessors, microcontrollers, and memories (such as Random-access memory, RAM and flash memory). It is a ...

, using 17 layers of metal and supporting speeds of 5.2

GHz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), often described as being equivalent to one event (or Cycle per second, cycle) per second. The hertz is an SI derived unit whose formal expression in ter ...

, which is higher than its predecessor, the z13. The PU chip has 10 cores but can have 7–10 cores (or "processor units" in IBM's parlance) enabled depending on configuration. The z14 cores support two-way

simultaneous multithreading Simultaneous multithreading (SMT) is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading. SMT permits multiple independent threads of execution to better use the resources provided by modern proces ...

for more applications than previously available. The PU chip is packaged in a single-chip module, which is the same as its predecessor, but a departure from previous designs which were mounted on large

multi-chip module A multi-chip module (MCM) is generically an electronic assembly (such as a package with a number of conductor terminals or Lead (electronics), "pins") where multiple integrated circuits (ICs or "chips"), semiconductor Die (integrated circuit), d ...

s. A computer drawer consists of six PU chips and one Storage Controller (SC) chip containing the L4 cache. The cores implement the CISC

z/Architecture z/Architecture, initially and briefly called ESA Modal Extensions (ESAME), is IBM's 64-bit complex instruction set computer (CISC) instruction set architecture, implemented by its mainframe computers. IBM introduced its first z/Architecture ...

with a

superscalar A superscalar processor (or multiple-issue processor) is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single in ...

, out-of-order

pipeline A pipeline is a system of Pipe (fluid conveyance), pipes for long-distance transportation of a liquid or gas, typically to a market area for consumption. The latest data from 2014 gives a total of slightly less than of pipeline in 120 countries ...

. New in z14 is a

cryptographic Cryptography, or cryptology (from "hidden, secret"; and ''graphein'', "to write", or '' -logia'', "study", respectively), is the practice and study of techniques for secure communication in the presence of adversarial behavior. More gen ...

coprocessor, called CPACF, attached to each core, used for

random number generation Random number generation is a process by which, often by means of a random number generator (RNG), a sequence of numbers or symbols is generated that cannot be reasonably predicted better than by random chance. This means that the particular ou ...

, hashing,

encryption In Cryptography law, cryptography, encryption (more specifically, Code, encoding) is the process of transforming information in a way that, ideally, only authorized parties can decode. This process converts the original representation of the inf ...

and decrypting and compression. Further enhancements include an optimization of the core's pipeline, doubling the on-chip caches, better

branch prediction In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else structure) will go before this is known definitively. The purpose of the branch predictor is to improve the flow ...

, a new decimal arithmetic

SIMD Single instruction, multiple data (SIMD) is a type of parallel computer, parallel processing in Flynn's taxonomy. SIMD describes computers with multiple processing elements that perform the same operation on multiple data points simultaneousl ...

engine designed to boost

COBOL COBOL (; an acronym for "common business-oriented language") is a compiled English-like computer programming language designed for business use. It is an imperative, procedural, and, since 2002, object-oriented language. COBOL is primarily ...

and

PL/I PL/I (Programming Language One, pronounced and sometimes written PL/1) is a procedural, imperative computer programming language initially developed by IBM. It is designed for scientific, engineering, business and system programming. It has b ...

code, a "guarded storage facility" that helps

Java Java is one of the Greater Sunda Islands in Indonesia. It is bordered by the Indian Ocean to the south and the Java Sea (a part of Pacific Ocean) to the north. With a population of 156.9 million people (including Madura) in mid 2024, proje ...

applications during garbage collection, and other enhancements that increase the cores' performance compared to the predecessors. The instruction pipeline has an instruction queue that can fetch 6 instructions per cycle; and issue up to 10 instructions per cycle. Each core has a private 128 KB L1 instruction cache, a private 128 KB L1 data cache, a private 2 MB L2 instruction cache, and a private 4 MB L2 data cache. In addition, there is a 128 MB shared L3 cache implemented in

eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivale ...

. The z14 chip has on board multi-channel DDR4 RAM

memory controller A memory controller, also known as memory chip controller (MCC) or a memory controller unit (MCU), is a digital circuit that manages the flow of data going to and from a computer's main memory. When a memory controller is integrated into anothe ...

supporting a

RAID RAID (; redundant array of inexpensive disks or redundant array of independent disks) is a data storage virtualization technology that combines multiple physical Computer data storage, data storage components into one or more logical units for th ...

-like configuration to recover from memory faults. The z14 also includes two GX bus as well as two new Gen 3 PCIe controllers for accessing host channel adapters and peripherals. The PU chips has three X-buses for communications to three neighboring PU chips and the SC chip.

Storage Controller

A compute drawer consists of two clusters. Each cluster comprises either two or three PU chips. The two clusters share a single Storage Controller chip (SC chip). Even though each PU chip has 128 MB L3 cache shared by the 10 cores and other on-die facilities, the SC chip adds 672 MB off-die

L4 cache shared by the six PU chips in the drawer. The SC chips also handle the communications between the sets of three PU in the drawer as well as communications between drawers using the A-Bus. The SC chip is manufactured on the same 14 nm process as the z14 PU chips, has 17 metal layers, similarly measures 25.3 × 27.5 mm (696 mm²), but consists of 9.7 billion transistors due to amount of L4 memory and runs at half the clock frequency of the PU chip.

References

{{Reflist z14 z14 Computer-related introductions in 2017