Gracemont is a
microarchitecture
In electronics, computer science and computer engineering, microarchitecture, also called computer organization and sometimes abbreviated as μarch or uarch, is the way a given instruction set architecture (ISA) is implemented in a particular ...
for low-power processors used in
systems on a chip (SoCs) made by
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and Delaware General Corporation Law, incorporated in Delaware. Intel designs, manufactures, and sells computer compo ...
, and is the successor to
Tremont. Like its predecessor, it is also implemented as low-power cores in a hybrid design of the
Alder Lake,
Raptor Lake
Raptor Lake is Intel's List of Intel codenames, codename for the 13th and 14th generations of Intel Core processors based on a Heterogeneous computing, hybrid architecture, utilizing Raptor Cove performance cores and Gracemont (microarchitecture ...
and Raptor Lake Refresh processors.
Design
Gracemont is the fourth generation
out-of-order low-power
Atom
Atoms are the basic particles of the chemical elements. An atom consists of a atomic nucleus, nucleus of protons and generally neutrons, surrounded by an electromagnetically bound swarm of electrons. The chemical elements are distinguished fr ...
microarchitecture, built on the
Intel 7 manufacturing process.
The Gracemont microarchitecture has the following enhancements over
Tremont:
* Level 1 cache per core:
** eight-way-associative 64KB instruction cache
** eight-way-associative 32KB data cache
* New On-Demand Instruction Length Decoder
* Instruction issue increased to five per clock (from four)
* Instruction retire increased to eight per clock (from seven)
* Execution ports (functional units) there are now 17 (from eight)
* Reorder buffer increased to 256 entries (from 208)
* Improved branch prediction
* Support for
AVX,
AVX2
Advanced Vector Extensions (AVX, also known as Gesher New Instructions and then Sandy Bridge New Instructions) are SIMD extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They w ...
,
FMA3
The FMA instruction set is an extension to the 128- and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations. There are two variants:
* FMA4 is supported in AM ...
and
AVX-VNNI instructions
* 2 or 4MB shared
L2 cache per 4-core cluster
Alder Lake-S/H/P/U family has 2MB. Raptor Lake-S/H/P/U family has 4MB.
Technology
*
System on a chip
A system on a chip (SoC) is an integrated circuit that combines most or all key components of a computer or Electronics, electronic system onto a single microchip. Typically, an SoC includes a central processing unit (CPU) with computer memory, ...
(SoC) architecture
* 3D
tri-gate transistors
*
Thermal design power (TDP)
** 10W desktop processors
** 6W mobile processors
List of Gracemont processors
The microarchitecture is used as the efficient cores of the 12th generation of Intel Core hybrid processors (codenamed "Alder Lake"), the 13th generation of Intel Core hybrid processors (codenamed "Raptor Lake") and the 14th generation of Intel Core hybrid processors (codenamed "Raptor Lake Refresh"). It's also used in the
Alder Lake-N line-up as the only core cluster, intended for low-power applications.
Alder Lake-N
See also
*
List of Intel CPU microarchitectures
References
{{IntelProcessorRoadmap
Intel x86 microprocessors
Intel microarchitectures
X86 microarchitectures
Computer-related introductions in 2021