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Automatic Device Model Synthesizer (ADMS) is a public domain software used in the
semiconductor industry The semiconductor industry is the aggregate of companies engaged in the design and fabrication of semiconductors and semiconductor devices, such as transistors and integrated circuits. It formed around 1960, once the fabrication of semiconduct ...
to translate Verilog-A models into C-models which can be directly read by a number of SPICE simulators, including Spectre Circuit Simulator,
Ngspice ''Ngspice'' is an open-source mixed-level/mixed-signal electronic circuit simulator. It is a successor of the latest stable release of Berkeley SPICE, version 3f.5, which was released in 1993. A small group of maintainers and the user community ...
and HSpice.


Overview

ADMS stands for Automatic Device Model Synthesizer. ADMS can be used to turn Verilog-A compact models into C code. ADMS interpreter parses a Verilog-AMS file to build a data tree. XML filters are applied on the tree to generate the output files. ADMS aims to reduce the effort of circuit simulator developers to integrate device models - at the same time, it provides the option to compact model developers to use the vendor-neutral language Verilog-A for model definition, improving robustness and maintainability. ADMS is used by the open source SPICE simulator NGSPICE to support a number of compact models. Following models are supported by NGSPICE using ADMS: * MOS EKV (LEVEL=44) * MOS PSP102 (LEVEL=45) * BJT Mextram 504 (LEVEL=6) * BJT Hicum0 (LEVEL=7) * BJT Hicum2 (LEVEL=8)


Limitations

ADMS only parses a subset of Verilog-A, and not all statements are supported by all XML filters. Specifically, current controlled voltage sources are not supported in most filters targeting SPICE simulators: * V(..) <+ I(..) // does not work with NGSPICE Instead, this needs to be represented as a conductance expression (and not impedance).
i.e. I(..) <+ V(..) * I (..) probes do not work with NGSPICE Some other language constructions need to be supported in the filter as well * ''for'' loop, * ''case'' statement. Many language features are hard to support with ADMS filters * laplace_transform, * idt, * switching branches. Important aspects of code generation are close to impossible with ADMS * dataflow analysis * code optimisation, and * ADMS is extremely slow (which can be seen on slightly larger models).


References

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External links

* http://ekv.epfl.ch/files/content/sites/ekv/files/mos-ak/wroclaw/MOS-AK_LL.pdf * http://sourceforge.net/projects/mot-adms/ * https://web.archive.org/web/20140109115034/http://www.techconnectworld.com/Microtech2012/pdf/WCM2012-MChan.pdf * https://web.archive.org/web/20140109112615/http://i-mos.org/imos2/ * http://ngspice.sourceforge.net/admshowto.html


See also

* Verilog-A * SPICE Electronic design automation software Public-domain software