1 Nm Process

In semiconductor manufacturing, the "1 nm process" represents the next significant milestone in MOSFET (metal–oxide–semiconductor field-effect transistor) scaling, succeeding the "2 nm" process node. It continues the industry trend of miniaturization in integrated circuit (IC) technology, which has been essential for improving performance, increasing transistor density, and reducing power consumption.

The term "1 nanometer" has no relation to any actual physical feature (such as gate length, metal pitch or gate pitch) of the transistors. According to the projections contained in the 2021 update of the International Roadmap for Devices and Systems published by the Institute of Electrical and Electronics Engineers (IEEE), a "1 nm node range label" is expected to have a contacted gate pitch of 42 nanometers and a tightest metal pitch of 16 nanometers. The first 1 nm chips are expected to be launched in 2027.

History

In 2008, transistors one atom thick and ten atoms wide were made by UK researchers. They were carved from graphene, predicted by some to one day oust silicon as the basis of future computing. Graphene is a material made from flat sheets of carbon in a honeycomb arrangement, and is a leading contender. A team at the University of Manchester, UK, used it to make some of the smallest transistors ever: devices only 1 nm across that contain just a few carbon rings.

In 2016, researchers at Lawrence Berkeley National Laboratory created a transistor with a working 1-nanometer gate. The field-effect transistor utilized MoS₂ as the channel material, while a carbon nanotube was used to invert the channel. The effective channel length is approximately 1 nm. However, the drain to source pitch was much bigger, with micrometre size.

Research and technology demos

In 2012 a single atom transistor was fabricated using a phosphorus atom bound to a silicon surface (between two significantly larger electrodes). This transistor could be said to be a 180 pm transistor (the Van der Waals radius of a phosphorus atom); though its covalent radius bound to silicon is likely smaller. Making transistors smaller than this will require either using elements with smaller atomic radii, or using subatomic particles—like electrons or protons—as functional transistors.

In 2018, researchers at Karlsruhe Institute of Technology created a transistor with a working single atom gate.

In July 2024, a team led by Director Jo Moon-Ho at the Center for Van der Waals Quantum Solids within the Institute for Basic Science (IBS) in Korea developed a method for the epitaxial growth of one-dimensional (1D) metallic materials with widths under 1 nm on silicon substrates. This process was utilized to construct a new structure for two-dimensional (2D) semiconductor logic circuits, employing these 1D metals as gate electrodes. The International Roadmap for Devices and Systems (IRDS) by the IEEE projects that semiconductor node technology may reach around 0.5 nm by 2037, with transistor gate lengths of approximately 12 nm. However, the IBS research team demonstrated that the channel width modulated by the electric field from the 1D MTB gate could be as small as 3.9 nm, surpassing these projections.

In April 2025, a team at Fudan University led by professors Wenzhong Bao and Peng Zhou announced that they had successfully created a 1nm RISC-V chip using two-dimensional semiconductors.

References

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, prev = "2 nm" (FinFET/GAAFET)
, list = MOSFET semiconductor device fabrication process
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