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Goldmont
Goldmont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. They allow only one thread per core. The ''Apollo Lake'' platform with 14 nm Goldmont core was unveiled at the Intel Developer Forum (IDF) in Shenzhen, China, April 2016. The Goldmont architecture borrows heavily from the Skylake Core processors, so it offers a more than 30 percent performance boost compared to the previous Braswell platform, and it can be used to implement power-efficient low-end devices including Cloudbooks, 2-in-1 netbooks, small PCs, IP cameras, and in-car entertainment systems. Design Goldmont is the 2nd generation out-of-order low-power Atom microarchitecture designed for the entry level desktop and notebook computers. Goldmont is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices. It includes the Intel Gen9 graphics architecture introduced with the Skylake. ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Goldmont Plus
Goldmont Plus is a microarchitecture for low-power Celeron and Pentium Silver branded processors used in systems on a chip (SoCs) made by Intel. The ''Gemini Lake'' platform with 14 nm Goldmont Plus core was officially launched on December 11, 2017. Intel launched the ''Gemini Lake Refresh'' platform on November 4, 2019. Design Goldmont Plus is an enhanced 2nd generation out-of-order low-power Atom microarchitecture designed for entry level desktop and notebook computers. Goldmont Plus is built on the 14 nm manufacturing process and supports up to four cores for the consumer devices. It includes the Intel Gen9 graphics architecture with improvements introduced with the Kaby Lake microarchitecture. The Goldmont Plus microarchitecture builds on the success of the Goldmont microarchitecture, and provides the following enhancements: * Widened previous generation Atom processor back-end pipeline to 4-wide allocation to 4-wide retire, while maintaining 3-wide fetch an ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Atom
Intel Atom is a line of IA-32 and x86-64 instruction set ultra-low-voltage processors by Intel Corporation designed to reduce electric consumption and power dissipation in comparison with ordinary processors of the Intel Core series. Atom is mainly used in netbooks, nettops, embedded applications ranging from health care to advanced robotics, mobile Internet devices (MIDs) and phones. The line was originally designed in 45 nanometer, 45 nm complementary metal–oxide–semiconductor (CMOS) technology and subsequent models, codenamed ''Cedar'', used a 32 nanometer, 32 nm process. The first generation of Atom processors are based on the Bonnell (microarchitecture), Bonnell microarchitecture. On December 21, 2009, Intel announced the ''Pine Trail'' platform, including new Atom processor code-named ''Pineview'' (Atom N450), with total kit power consumption down 20%. On December 28, 2011, Intel updated the Atom line with the ''Cedar'' processors. In December 2012, Intel launched t ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Atom (system On Chip)
Atom is a system on a chip (SoC) platform designed for smartphones and tablet computers, launched by Intel in 2012. It is a continuation of the partnership announced by Intel and Google on September 13, 2011 to provide support for the Android operating system on Intel x86 processors. This range competes with existing SoCs developed for the smartphone and tablet market from companies such as Texas Instruments, Nvidia, Qualcomm and Samsung. Unlike these companies, which use ARM-based CPUs designed from the beginning to consume very low power, Intel has adapted the x86-based Intel Atom line of CPU developed for low power usage in netbooks, to even lower power usage. Since April 2012, several manufacturers have released Intel Atom-based tablets and phones as well as using the SoCs as a basis for other small form factor devices (e.g. mini PCs and stick PCs). In April 2016, Intel announced a major restructuring, including the cancellation of the SoFIA platform. It was reported by ma ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Celeron
Celeron is a series of IA-32 and x86-64 computer microprocessor, microprocessors targeted at low-cost Personal computer, personal computers, manufactured by Intel from 1998 until 2023. The first Celeron-branded CPU was introduced on April 15, 1998, and was based on the Pentium II. Celeron-branded processors released from 2009 to 2023 are compatible with IA-32 software. They typically offer less performance per clock speed compared to flagship Intel CPU lines, such as the Pentium or Intel Core, Core brands. They often have less CPU cache, cache or intentionally disabled advanced features, with variable impact on performance. While some Celeron designs have achieved strong performance for their segment, the majority of the Celeron line has exhibited noticeably degraded performance. This has been the primary Market segmentation, justification for the higher cost of other Intel CPU brands versus the Celeron range. In September 2022, Intel announced that the Celeron brand, along wit ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pentium
Pentium is a series of x86 architecture-compatible microprocessors produced by Intel from 1993 to 2023. The Pentium (original), original Pentium was Intel's fifth generation processor, succeeding the i486; Pentium was Intel's flagship processor line for over a decade until the introduction of the Intel Core line in 2006. Pentium-branded processors released from 2009 onwards were considered entry-level products positioned above the low-end Intel Atom, Atom and Celeron series, but below the faster Core lineup and workstation/server Xeon series. The later Pentiums, which have little more than their name in common with earlier Pentiums, were based on both the architecture used in Atom and that of Core processors. In the case of Atom architectures, Pentiums were the highest performance implementations of the architecture. Pentium processors with Core architectures prior to 2017 were distinguished from the faster, higher-end i-series processors by lower clock rates and disabling ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel SHA Extensions
A SHA instruction set is a set of extensions to the x86 and ARM architecture, ARM instruction set architecture which support hardware acceleration of Secure Hash Algorithm (SHA) family. It was specified in 2013 by Intel. Instructions for SHA-512 was introduced in Arrow Lake (microprocessor), Arrow Lake and Lunar Lake in 2024. x86 architecture processors The original Streaming SIMD Extensions, SSE-based extensions added four instructions supporting SHA-1 and three for SHA-256. * SHA-1: SHA1RNDS4, SHA1NEXTE, SHA1MSG1, SHA1MSG2 * SHA-256: SHA256RNDS2, SHA256MSG1, SHA256MSG2 The newer SHA-512 instruction set comprises Advanced Vector Extensions, AVX-based versions of the original SHA instruction set marked with a V prefix and these three new AVX-based instructions for SHA-512: * VSHA512RNDS2, VSHA512MSG1, VSHA512MSG2 AMD All recent AMD processors support the original SHA instruction set: * AMD Zen (microarchitecture), Zen (2017) and later processors. Intel The following Intel p ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
SSE4
SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper;Intel Streaming SIMD Extensions 4 (SSE4) Instruction Set Innovation , Intel. more precise details of 47 instructions became available at the Spring 2007 Intel Developer Forum in , in the presentation. SSE4 extended the SSE3 instruction set which was released in early 2004. All software using previous Intel SIMD instructio ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Airmont Microarchitecture
Silvermont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. Silvermont forms the basis for a total of four SoC families: * ''Merrifield'' and ''Moorefield'' consumer SoCs intended for smartphones * ''Bay Trail'' consumer SoCs aimed at tablets, hybrid devices, netbooks, nettops, and embedded/automotive systems * ''Avoton'' SoCs for micro-servers and storage devices * ''Rangeley'' SoCs targeting network and communication infrastructure. Silvermont is the successor of the Bonnell, using a newer 22 nm process (previously introduced with Ivy Bridge) and a new microarchitecture, replacing Hyper Threading with out-of-order execution. Silvermont was announced to news media on May 6, 2013, at Intel's headquarters at Santa Clara, California. Intel had repeatedly said the first Bay Trail devices would be available during the Holiday 2013 timeframe, while leaked slides showed that the release window fo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CLMUL Instruction Set
Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010. Mathematically, the instruction implements multiplication of polynomials over the finite field GF(2) where the bitstring a_0a_1\ldots a_ represents the polynomial a_0 + a_1X + a_2X^2 + \cdots + a_X^. The CLMUL instruction also allows a more efficient implementation of the closely related multiplication of larger finite fields GF(2''k'') than the traditional instruction set. One use of these instructions is to improve the speed of applications doing block cipher encryption in Galois/Counter Mode, which depends on finite field GF(2''k'') multiplication. Another application is the fast calculation of CRC values, including those used to implement the LZ77 sliding window DEFLATE algorithm in zlib and pngcrush. ARMv8 also has a version of CLMU ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Braswell (SOC)
Silvermont is a microarchitecture for low-power Atom, Celeron and Pentium branded processors used in systems on a chip (SoCs) made by Intel. Silvermont forms the basis for a total of four SoC families: * ''Merrifield'' and ''Moorefield'' consumer SoCs intended for smartphones * ''Bay Trail'' consumer SoCs aimed at tablets, hybrid devices, netbooks, nettops, and embedded/automotive systems * ''Avoton'' SoCs for micro-servers and storage devices * ''Rangeley'' SoCs targeting network and communication infrastructure. Silvermont is the successor of the Bonnell, using a newer 22 nm process (previously introduced with Ivy Bridge) and a new microarchitecture, replacing Hyper Threading with out-of-order execution. Silvermont was announced to news media on May 6, 2013, at Intel's headquarters at Santa Clara, California. Intel had repeatedly said the first Bay Trail devices would be available during the Holiday 2013 timeframe, while leaked slides showed that the release window fo ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
AES Instruction Set
An Advanced Encryption Standard instruction set (AES instruction set) is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern processors and can greatly accelerate AES operations compared to software implementations. An AES instruction set includes instructions for key expansion, encryption, and decryption using various key sizes (128-bit, 192-bit, and 256-bit). The instruction set is often implemented as a set of instructions that can perform a single round of AES along with a special version for the last round which has a slightly different method. When AES is implemented as an instruction set instead of as software, it can have improved security, as its side channel attack surface is reduced. x86 architecture processors AES-NI (or the Intel Advanced Encryption Standard New Instructions; AES-NI) was the first major implementation. AES-NI is an extension to the x8 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
System On A Chip
A system on a chip (SoC) is an integrated circuit that combines most or all key components of a computer or Electronics, electronic system onto a single microchip. Typically, an SoC includes a central processing unit (CPU) with computer memory, memory, input/output, and computer data storage#Secondary storage, data storage control functions, along with optional features like a graphics processing unit (GPU), Wi-Fi connectivity, and radio frequency processing. This high level of integration minimizes the need for separate, discrete components, thereby enhancing Performance per watt, power efficiency and simplifying device design. High-performance SoCs are often paired with dedicated memory, such as LPDDR, and flash storage chips, such as Universal Flash Storage, eUFS or eMMC, which may be stacked directly on top of the SoC in a Package on a package, package-on-package (PoP) configuration or placed nearby on the motherboard. Some SoCs also operate alongside specialized chips, such ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
