A status register, flag register, or condition code register is a collection of status flag bits for a processor. An example is the FLAGS register of the x86 architecture or flags in a program status word (PSW) register. The status register is a hardware register that contains information about the state of the processor. Individual bits are implicitly or explicitly read and/or written by the machine code instructions executing on the processor. The status register lets an instruction take action contingent on the outcome of a previous instruction. Typically, flags in the status register are modified as effects of arithmetic and bit manipulation operations. For example, a Z bit may be set if the result of the operation is zero and cleared if it is nonzero. Other classes of instructions may also modify the flags to indicate status. For example, a string instruction may do so to indicate whether the instruction terminated because it found a match/mismatch or because it found the end of the string. The flags are read by a subsequent conditional instruction so that the specified action (depending on the processor, a jump, call, return, or so on) occurs only if the flags indicate a specified result of the earlier instruction. Some CPU architectures, such as the MIPS and Alpha, do not use a dedicated flag register. Others do not implicitly set and/or read flags. Such machines either do not pass implicit status information between instructions at all, or they pass it in an explicitly selected general purpose register. A status register may often have other fields as well, such as more specialized flags, interrupt enable bits, and similar types of information. During an interrupt, the status of the thread currently executing can be preserved (and later recalled) by storing the current value of the status register along with the program counter and other active registers into the machine stack or some other reserved area of memory.
1 Common flags 2 Other flags 3 CPU architectures without arithmetic flags 4 See also 5 References
Common flags This is a list of the most common CPU status register flags, implemented in almost all modern processors.
Flag Name Description
Z Zero flag Indicates that the result of an arithmetic or logical operation (or, sometimes, a load) was zero.
C Carry flag Enables numbers larger than a single word to be added/subtracted by carrying a binary digit from a less significant word to the least significant bit of a more significant word as needed. It is also used to extend bit shifts and rotates in a similar manner on many processors (sometimes done via a dedicated X flag).
S / N Sign flag Negative flag Indicates that the result of a mathematical operation is negative. In some processors, the N and S flags are distinct with different meanings and usage: One indicates whether the last result was negative whereas the other indicates whether a subtraction or addition has taken place.
V / O / W Overflow flag Indicates that the signed result of an operation is too large to fit in the register width using two's complement representation.
Other flags On some processors, the status register also contains flags such as these:
Flag Name Description
H / A / DC Half-carry flag Auxiliary flag Digit Carry Decimal adjust flag Indicates that a bit carry was produced between the nibbles (typically between the 4-bit halves of a byte operand) as a result of the last arithmetic operation. Such a flag is generally useful for implementing BCD arithmetic operations on binary hardware.
P Parity flag Indicates whether the number of set bits of the last result is odd or even.
S Supervisor flag On processors that provide two or more protection rings, one or more bits in the status register indicate the ring of the current thread (how trusted it is, or whether it must use the operating system for requests that could hinder other threads). On a processor with only two rings, a single bit may distinguish Supervisor from User mode.
CPU architectures without arithmetic flags
Status flags enable an instruction to act based on the result of a
previous instruction. In pipelined processors, such as superscalar and
speculative processors, this can create hazards that slow processing
or require extra hardware to work around them.
Some very long instruction word processors dispense with the status
flags. A single instruction both performs a test and indicates on
which outcome of that test to take an action, such as Compare a with b
and Jump to c if Equal. The result of the test is not saved for
Another alternative to the status register is for processor
instructions to deposit status information in a general-purpose
register when the program requests it. MIPS, AMD 29000, DEC Alpha, and
# alow = blow + clow addu alow, blow, clow # set tmp = 1 if alow < clow, else 0 sltu tmp, alow, clow addu ahigh, bhigh, chigh addu ahigh, ahigh, tmp
The sltu instruction sets tmp to 1 or 0 based on the specified comparison of its two other operands. (Here, the general-purpose register tmp is not used as a status register to govern a conditional jump; rather, the possible value of 1, indicating overflow from the low-order addition, is added to the high-order word.) See also
Control register CPU flag (x86) Flag field FLAGS register (computing)
^ Toshiba 900 Operation Manual, chap. 3 ^ http://www.atmel.com/Images/Atmel-8271-8-bit-AVR-Microcontroller-ATmega48A-48PA-88A-88PA-168A-168PA-328-328P_datasheet.pdf ^ a b Mashey, John (1996-06-04). "Carry bits; The Architect's Trap". Retrieved 2013-