SPARC T5 is the fifth generation
multicore microprocessor of
Oracle's SPARC T series The SPARC T-series family of RISC processors and server computers, based on the SPARC V9 architecture, was originally developed by Sun Microsystems, and later by Oracle Corporation after its acquisition of Sun. Its distinguishing feature from e ...
family. It was first presented at
Hot Chips
The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operation ...
24 in August 2012,
and was officially introduced with the Oracle
SPARC T5 servers in March 2013.
The processor is designed to offer high multithreaded performance (16 cores per chip, with 8 threads per core), as well as high single threaded performance from the same chip.
The processor uses the same SPARC S3 core design as its predecessor, the
SPARC T4
The SPARC T4 is a SPARC multicore microprocessor introduced in 2011 by Oracle Corporation. The processor is designed to offer high multithreaded performance (8 threads per core, with 8 cores per chip), as well as high single threaded performan ...
processor, but is implemented in a 28 nm process and runs at 3.6 GHz.
The S3 core is a dual-issue core that uses dynamic
threading and
out-of-order execution,
incorporates one
floating point unit
Floating may refer to:
* a type of dental work performed on horse teeth
* use of an isolation tank
* the guitar-playing technique where chords are sustained rather than scratched
* ''Floating'' (play), by Hugh Hughes
* Floating (psychological ...
, one dedicated
cryptographic unit per core.
The 64-bit SPARC Version 9 based processor has 16 cores supporting up to 128 threads per processor, and scales up to 1,024 threads in an 8
socket
Socket may refer to:
Mechanics
* Socket wrench, a type of wrench that uses separate, removable sockets to fit different sizes of nuts and bolts
* Socket head screw, a screw (or bolt) with a cylindrical head containing a socket into which the hexag ...
system.
Other changes include the support of PCIe version 3.0 and a new cache coherence protocol.
[
]
SPARC T4, T5 and T7/M7 compared
This chart shows some differences between the T5 and T4 processor chips.
The SPARC T5 also introduces a new power management
Power management is a feature of some electrical appliances, especially copiers, computers, computer CPUs, computer GPUs and computer peripherals such as monitors and printers, that turns off the power or switches the system to a low-power st ...
feature that consists of hardware support in the processor, and the software that allows system administrator to use the feature. Users select the policy how the system responds to over-temperature and over-current events. The dynamic voltage and frequency scaling (aka DVFS) policy can be set to maintain peak frequency, or to trade off between performance and power consumption.[
]
SPARC T5 in systems
The SPARC T5 processor is used in Oracle's entry and mid-size SPARC T5-2, T5-4, and T5-8 servers. All servers use the same processor frequency, number of cores per chip and cache configuration.
The T5 processor includes a crossbar network that connects the 16 cores with the L2 caches to the shared L3 cache. Multiprocessor cache coherence is maintained using a directory-based protocol.[ The design scales up to eight sockets without additional silicon ( glueless). The snooping based protocol used in SPARC T4 systems was replaced in order to reduce memory latency and reduce coherency bandwidth consumption.]
References
External links
{{Sun hardware
Oracle microprocessors
SPARC microprocessors
64-bit microprocessors