S1 Core (codename Sirocco) is an
open source hardware
Open-source hardware (OSH) consists of physical artifacts of technology designed and offered by the open-design movement. Both free and open-source software (FOSS) and open-source hardware are created by this open-source culture movement and ...
microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...
design developed by Simply RISC. Based on
Sun Microsystems
Sun Microsystems, Inc. (Sun for short) was an American technology company that sold computers, computer components, software, and information technology services and created the Java programming language, the Solaris operating system, ZFS, the ...
'
UltraSPARC T1
Sun Microsystems' UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename "Niagara", is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU ty ...
, the S1 Core is licensed under the
GNU General Public License
The GNU General Public License (GNU GPL or simply GPL) is a series of widely used free software licenses that guarantee end users the Four Freedoms (Free software), four freedoms to run, study, share, and modify the software. The license was th ...
, which is the license Sun chose for the
OpenSPARC OpenSPARC is an open-source hardware project started in December 2005. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32- thread microprocessor, the UltraSPARC T1 process ...
project.
The main goal of the project is to keep the S1 Core as simple as possible to encourage developers. The major differences between T1 and S1 include:
* S1 Core only has one 64-bit
SPARC
SPARC (Scalable Processor Architecture) is a reduced instruction set computer (RISC) instruction set architecture originally developed by Sun Microsystems. Its design was strongly influenced by the experimental Berkeley RISC system developed ...
Core (supporting one to four independent threads of execution) instead of eight cores;
* S1 Core adds a
Wishbone
Wishbone commonly refers to:
* Furcula, a fork-shaped bone in birds and some dinosaurs
Wishbone may also refer to:
* Wish-Bone, an American salad dressing and condiment company
* Wishbone formation, a type of offense in American football
* Wish ...
bridge, a reset controller and a basic
interrupt controller;
* the S1 Core environment can be run using only free tools on a common x86 Linux machine.
See also
*
LEON
Leon, Léon (French) or León (Spanish) may refer to:
Places
Europe
* León, Spain, capital city of the Province of León
* Province of León, Spain
* Kingdom of León, an independent state in the Iberian Peninsula from 910 to 1230 and again f ...
*
OpenRISC
OpenRISC is a project to develop a series of open-source hardware based central processing units (CPUs) on established reduced instruction set computer (RISC) principles. It includes an instruction set architecture (ISA) using an open-source licen ...
External links
Simply RISC - S1 Core(archive.org link - as of 2018/11/5 original url redirects to OpenPiton)
OpenPitonSimply RISC site redirects to here, as of 2018/11/5, it is unclear if it is related.
S1 Core page on OpenCoresS1 Core page on SunSource*
Open microprocessors
SPARC microprocessors
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