In digital electronics , a NAND GATE (NEGATIVE-AND) is a logic gate
which produces an output which is false only if all its inputs are
true; thus its output is complement to that of the
**AND gate** . A LOW
(0) output results only if both the inputs to the gate are HIGH (1);
if one or both inputs are LOW (0), a HIGH (1) output results. It is
made using transistors and junction diodes. By De Morgan\'s theorem ,
AB=A+B, and thus a N
**AND gate** is equivalent to inverters followed by an
**OR gate** .

The N
**AND gate** is significant because any boolean function can be
implemented by using a combination of NAND gates. This property is
called functional completeness . It shares this property with the NOR
gate .

Digital systems employing certain logic circuits take advantage of
NAND's functional completeness.

The function NAND(a1, a2, ..., an) is logically equivalent to NOT(a1
AND a2 AND ... AND an).

CONTENTS

* 1 Symbols
* 2 Hardware description and pinout

* 3 Implementations

* 3.1 Alternatives

* 4 See also
* 5 References
* 6 External links

SYMBOLS

There are three symbols for NAND gates: the MIL/
**ANSI** symbol, the IEC
symbol and the deprecated
**DIN** symbol sometimes found on old
schematics. For more information see logic gate symbols . The ANSI
symbol for the N
**AND gate** is a standard
**AND gate** with an inversion
bubble connected.

MIL/
**ANSI** Symbol
IEC Symbol
**DIN** Symbol

HARDWARE DESCRIPTION AND PINOUT

NAND gates are basic logic gates, and as such they are recognised in
TTL and
**CMOS** ICs . This schematic diagram shows the arrangement of
NAND gates within a standard 4011
**CMOS** integrated circuit.

IMPLEMENTATIONS

The N
**AND gate** has the property of functional completeness . That is,
any other logic function (AND, OR, etc.) can be implemented using only
NAND gates. An entire processor can be created using NAND gates
alone. In TTL ICs using multiple-emitter transistors , it also
requires fewer transistors than a NOR gate.

NMOS N
**AND gate**
PMOS N
**AND gate**
**CMOS** N
**AND gate**
TTL N
**AND gate**
The physical layout of a
**CMOS** NAND
Die of a 74AHC00D quad 2-input N
**AND gate** manufactured by NXP
Semiconductors

ALTERNATIVES

If no specific NAND gates are available, one can be made from NOR
gates, because NAND and NOR gates are considered the "universal
gates", meaning that they can be used to make all the other gates.

DESIRED GATE
NOR CONSTRUCTION

SEE ALSO

*
**AND gate**
*
**OR gate**
* NOT gate
* N
**OR gate**
* X
**OR gate**
* XN
**OR gate**
*
**Boolean algebra**
*
**Logic gate**
*
**NAND logic**
*
**Digital electronics**

REFERENCES

* ^ A B Mano, M. Morris and Charles R. Kime. Logic and Computer
Design Fundamentals, Third Edition. Prentice Hall, 2004. p. 73. Cite
error: Invalid tag; name "Mano" defined multiple times with different
content (see the help page