The following is a list of

Intel Core Intel Core is a line of streamlined midrange consumer, workstation and enthusiast computer central processing units (CPUs) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time o ...

i7 brand

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...

s. Introduced in 2008, the Core i7 line of microprocessors are intended to be used by high-end users.

Desktop processors

Nehalem microarchitecture (1st generation)

"Bloomfield" (45 nm)

* All models support:

MMX MMX may refer to: * 2010, in Roman numerals Science and technology * MMX (instruction set), a single-instruction, multiple-data instruction set designed by Intel * MMX Mineração, a Brazilian mining company * Martian Moons eXploration, a Japane ...

, SSE,

SSE2 SSE2 (Streaming SIMD Extensions 2) is one of the Intel SIMD (Single Instruction, Multiple Data) processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2000. It extends the earlier SSE i ...

SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...

SSSE3 Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitectu ...

, SSE4.1, SSE4.2, Enhanced Intel

SpeedStep Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel microprocessors that allow the clock speed of the processor to be dyna ...

Technology (EIST),

Intel 64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mo ...

, XD bit (an

NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...

implementation),

Intel VT-x x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...

Hyper-threading Hyper-threading (officially called Hyper-Threading Technology or HT Technology and abbreviated as HTT or HT) is Intel's proprietary simultaneous multithreading (SMT) implementation used to improve parallelization of computations (doing multipl ...

, Turbo Boost, Smart Cache. * FSB has been replaced with

QPI The Intel QuickPath Interconnect (QPI) is a point-to-point processor interconnect developed by Intel which replaced the front-side bus (FSB) in Xeon, Itanium, and certain desktop platforms starting in 2008. It increased the scalability and avai ...

. * Transistors: 731 million *

Die Die, as a verb, refers to death, the cessation of life. Die may also refer to: Games * Die, singular of dice, small throwable objects used for producing random numbers Manufacturing * Die (integrated circuit), a rectangular piece of a semicondu ...

size: 263 mm * Steppings: C0, D0

"Lynnfield" (45 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

Intel VT-d x86 virtualization is the use of hardware-assisted virtualization capabilities on an x86/x86-64 CPU. In the late 1990s x86 virtualization was achieved by complex software techniques, necessary to compensate for the processor's lack of hardware-a ...

, Turbo Boost, Smart Cache. * Core i7-875K features an unlocked multiplier and does not support Intel TXT and Intel VT-d. * FSB has been replaced with DMI. *Moves the QPI link and PCI-Express controller onto the processor itself (eliminating the northbridge), using DMI to interface a single-component "chipset" (now called PCH) that serves traditional southbridge functions. * Transistors: 774 million *

size: 296 mm * Stepping: B1

Westmere microarchitecture (1st generation)

"Gulftown" (32 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

AES-NI An Advanced Encryption Standard instruction set is now integrated into many processors. The purpose of the instruction set is to improve the speed and security of applications performing encryption and decryption using Advanced Encryption Standard ...

, Smart Cache. * Core i7-980X, 990X, and 995X feature an unlocked multiplier. * FSB has been replaced with

. * Transistors: 1.17 billion *

size: 239 mm * Steppings: B1

Sandy Bridge microarchitecture (2nd generation)

"Sandy Bridge" (32 nm)

* Most models support:

, SSE,

, SSE4.1, SSE4.2, AVX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost,

, Smart Cache,

Intel Insider Intel Graphics Technology (GT) is the collective name for a series of integrated graphics processors (IGPs) produced by Intel that are manufactured on the same package or die as the central processing unit (CPU). It was first introduced in 201 ...

vPro The VPRO (stylized vpro; originally an acronym for , ) is a Dutch public broadcaster, which forms a part of the Dutch public broadcasting system. Founded in 1926 as a liberal Protestant broadcasting organization, it gradually became more ...

* Support for up to 4

DIMM A DIMM () (Dual In-line Memory Module), commonly called a RAM stick, comprises a series of dynamic random-access memory integrated circuits. These memory modules are mounted on a printed circuit board and designed for use in personal computers ...

S of

DDR3 Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed ...

-1333 memory. *S processors feature lower-than-normal TDP (65 W on 4-core models). *K processors have unlocked turbo multiplier but does not support Intel TXT,

and

. * Non-K processors will have limited turbo overclocking. * Transistors: 1.16 billionAnand Lal Shimpi (September 14, 2011)
"Counting Transistors: Why 1.16B and 995M Are Both Correct"
*

size: 216 mm

"Sandy Bridge-E" (32 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache. * Support for up to 8

S of

-1600 memory. * Transistors: 1.27 (M1 stepping) or 2.27 (C1, C2 steppings) billion *

size: 294 (M1 stepping) or 435 (C1, C2 steppings) mm

Ivy Bridge microarchitecture (3rd generation)

"Ivy Bridge" (22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache,

* Support for up to 4

S of

-1600 memory. * All models except the K processors additionally support Intel TXT,

and

. *S processors feature lower-than-normal TDP (65 W on 4-core models). *T processors are power optimized *K processors have unlocked turbo multiplier but do not support Intel TXT,

. Non-K processors will have limited turbo overclocking. * Transistors: 1.4 billion *

size: 160 mm

"Ivy Bridge-E" (22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache. * Support for up to 8

S of

-1866 memory. * Transistors: 1.86 billion *

size: 256.5 mm

Haswell microarchitecture (4th generation)

"Haswell-DT" (quad-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

AVX2 Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bri ...

, FMA3, F16C, ( BMI1)(Bit Manipulation Instructions1)+BMI2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache,

* All models except the i7-4770K additionally supported Intel TSX-NI at launch, but support was disabled in later stepping and microcode updates, due to the incorrect implementation, that could not be solved by microcode without hurting performance or fixing it fully. * All models except the i7-4770K additionally support

* All models except the i7-4770K and i7-4790K additionally support

and TXT * Transistors: 1.4 billion *

size: 177 mm

"Haswell-H" (MCP, quad-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, ( BMI1)(Bit Manipulation Instructions1)+BMI2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache,

. *i7-4770R does not support

TSX The Toronto Stock Exchange (TSX; french: Bourse de Toronto) is a stock exchange located in Toronto, Ontario, Canada. It is the 10th largest exchange in the world and the third largest in North America based on market capitalization. Based in the ...

, TXT and

Vpro The VPRO (stylized vpro; originally an acronym for , ) is a Dutch public broadcaster, which forms a part of the Dutch public broadcasting system. Founded in 1926 as a liberal Protestant broadcasting organization, it gradually became more ...

. * Core i7-4770R also contains "Crystalwell": 128 MB

eDRAM Embedded DRAM (eDRAM) is dynamic random-access memory (DRAM) integrated on the same die or multi-chip module (MCM) of an application-specific integrated circuit (ASIC) or microprocessor. eDRAM's cost-per-bit is higher when compared to equivalen ...

built at 22 nm acting as

L4 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, wh ...

* Transistors: 1.4 billion *

size: 264 mm + 84 mm

"Haswell-E" (22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache. * Support for up to 8

S of

DDR4 Double Data Rate 4 Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) is a type of synchronous dynamic random-access memory with a high bandwidth (" double data rate") interface. Released to the market in 2014, it is a variant of dynamic ran ...

-2133 memory. * Transistors: 2.60 billion *

size: 356 mm * i7-5820K has 28 PCI Express lanes; i7-5930K and i7-5960X have 40

Broadwell microarchitecture (5th generation)

"Broadwell-H" (quad-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, ( BMI1)(Bit Manipulation Instructions1)+BMI2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache,

, Intel TSX-NI * All models also contain "Crystal Well": 128 MB

acting as

* Transistors: *

size: 166mm * PCI Express lanes: 16

"Broadwell-E" (14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 3.0,

, Smart Cache. * Does not support Intel TSX-NI (disabled using microcode update, due to the hardware bugs in most of the steppings). * Support for up to 8

S of

-2400 memory. * Transistors: *

size: 247mm * i7-6800K has 28 PCI Express lanes; all others have 40

Skylake microarchitecture (6th generation)

"Skylake-S" (quad-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, BMI1 (Bit Manipulation Instructions 1) and BMI2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache,

, Intel SGX, Intel MPX, Intel TSX-NI * Embedded models also support:

Intel vPro Intel vPro technology is an umbrella marketing term used by Intel for a large collection of computer hardware technologies, including VT-x, VT-d, Trusted Execution Technology (TXT), and Intel Active Management Technology (AMT). When the vPro ...

, Intel TXT. * Transistors: *

size: 122.4 mm * PCI Express lanes: 16

"Skylake-H" (quad-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, ( BMI1)(Bit Manipulation Instructions1)+BMI2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 2.0,

, Smart Cache,

, Intel TXT, Intel SGX, Intel MPX, Intel TSX-NI. * Transistors: *

size: * PCI Express lanes: 16

"Skylake-X" (14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, AVX-512, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Intel TSX-NI, Smart Cache. * PCI Express lanes: 28 (78xx), 44 (98xx)

Kaby Lake microarchitecture (7th generation)

"Kaby Lake-S" (14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Intel TSX-NI,

, Intel TXT, Smart Cache. * Low power models also support

configurable TDP The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often a CPU, GPU or system on a chip) that the cooling system in a computer is designed to dissipate ...

(cTDP) down. * K models do not support Intel vPro, Intel TXT. *

size: 126.15 mm * PCI Express lanes: 16

"Kaby Lake-X" (14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Intel TSX-NI, Smart Cache. * PCI Express lanes: 16

Coffee Lake microarchitecture (8th/9th generation)

"Coffee Lake-S" (14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

(8xxx only),

, Intel TSX-NI,

(except 8086K), Intel TXT, Smart Cache. *

size: 151 mm (6 cores), 177 mm (8 cores) * PCI Express lanes: 16

Comet Lake microarchitecture (10th generation)

"Comet Lake-S" (14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 3.0,

, Smart Cache. * All models support up to DDR4-2933 memory. * Low power and K models also support

(cTDP) down. * Overclocking: Unlocked multiplier on K and KF models.

Cypress Cove microarchitecture (11th generation)

"Rocket Lake-S" (14 nm)

* All models support: SSE4.1, SSE4.2, AVX,

, AVX-512, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 3.0, Intel TXT,

, Smart Cache, DL Boost. * All models support up to DDR4-3200 memory, and 20 lanes of

PCI Express PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe or PCI-e, is a high-speed serial computer expansion bus standard, designed to replace the older PCI, PCI-X and AGP bus standards. It is the common ...

4.0. * Low power and K models also support

(cTDP) down. * Overclocking: Unlocked multiplier on K and KF models.

Golden Cove Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process no ...
+ Gracemont microarchitecture (12th generation)

" Alder Lake" (Intel 7)

* All models support: '' SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 3.0 (2.0 for embedded),

, Smart Cache, Thread Director, DL Boost, GNA 3.0, and Optane ''memory. * All models support up to

DDR5 Double Data Rate 5 Synchronous Dynamic Random-Access Memory (DDR5 SDRAM) is a type of synchronous dynamic random-access memory. Compared to its predecessor DDR4 SDRAM, DDR5 was planned to reduce power consumption, while doubling bandwidth. Th ...

-4800 or

-3200 memory, and 16 lanes of

5.0 + 4 lanes of PCIe 4.0. * Overclocking: Unlocked multiplier on K and KF models.

Raptor Cove + Gracemont microarchitecture (13th generation)

Raptor Lake (Intel 7)

* All models support: '' SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost 3.0,

, Smart Cache, Thread Director, DL Boost, ''and'' GNA 3.0. * All models support up to

-5600 or

-3200 memory, and 16 lanes of

5.0 + 4 lanes of PCIe 4.0. * Overclocking: Unlocked multiplier on K and KF models.

Mobile processors

Nehalem microarchitecture (1st generation)

"Clarksfield" (45 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost, Smart Cache. * FSB has been replaced with DMI. * Transistors: 774 million *

size: 296 mm * Steppings: B1 *XM models feature an unlocked multiplier, allowing them to be overclocked.

Westmere microarchitecture (1st generation)

"Arrandale" (MCP, 32 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost,

, Smart Cache. * FSB has been replaced with DMI. * Contains 45 nm "Ironlake"

GPU A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...

. * CPU Transistors: 382 million * CPU

die Die, as a verb, refers to death, the cessation of life. Die may also refer to: Games * Die, singular of dice, small throwable objects used for producing random numbers Manufacturing * Die (integrated circuit), a rectangular piece of a semicondu ...

size: 81 mm * Graphics and Integrated Memory Controller transistors: 177 million * Graphics and integrated memory controller die size: 114 mm * Steppings: C2, K0 * Core i7-610E, i7-620UE, i7-620LE and i7-660UE have support for ECC memory and PCI express port bifurcation.

Sandy Bridge microarchitecture (2nd generation)

"Sandy Bridge (dual-core)" (32 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost,

, Smart Cache. * Core i7-2620M, Core i7-2640M, Core i7-2637M, and Core i7-2677M support

* Core i7-2610UE, Core i7-2655LE does not support XD bit (Execute Disable bit). * Core i7-2610UE, Core i7-2655LE has support for ECC memory * Transistors: 624 million *

size: 149 mm

"Sandy Bridge (quad-core)" (32 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost,

, Smart Cache,

. * Core i7-2630QM, Core i7-2635QM, Core i7-2670QM, Core i7-2675QM do not support TXT and Intel VT-d. * Core i7-2715QE has support for ECC memory. * Core i7-2710QE, Core i7-2715QE do not support

and XD bit.(Execute Disable bit). * Transistors: 1.16 billion *

size: 216 mm *XM models feature an unlocked multiplier, allowing them to be overclocked.

Ivy Bridge microarchitecture (3rd generation)

"Ivy Bridge (dual-core)" (22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost2.0,

, Smart Cache,

. * Core i7-3517U and i7-3537U do not support Intel TXT. * Core i7-3555LE and Core i7-3517UE do not support

"Ivy Bridge (quad-core)" (22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), TXT,

, Turbo Boost,

, Smart Cache,

. * Core i7-3610QM, Core i7-3612QM and Core i7-3630QM (Socket G2) do not support Intel VT-d. * Core i7-3610QE, Core i7-3615QE and Core i7-3612QE do not support

. * Transistors: 1.4 billion *

size: 160 mm *XM models feature an unlocked multiplier, allowing them to be overclocked.

Haswell microarchitecture (4th generation)

"Haswell-MB" (dual-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation), Intel TXT,

, Turbo Boost,

, Smart Cache * Transistors: 1.3 billion *

size: 181 mm

"Haswell-ULT" (SiP, dual-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache * Core i7-4550U and higher also support

* Core i7-4600U and i7-4650U also support

and Intel TXT * Transistors: 1.3 billion *

size: 181 mm

"Haswell-ULX" (SiP, dual-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache,

and Intel TXT * Transistors: 1.3 billion *

size: 181 mm

"Haswell-MB" (quad-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, F16C, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache, and

* Core i7-48xxMQ, i7-49xxMQ, and all MX models also support Intel TXT,

, and

. * Transistors: 1.4 billion *

size: 177 mm *MX models feature an unlocked multiplier, allowing them to be overclocked.

"Haswell-H" (MCP, quad-core, 22 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Intel TXT,

, Turbo Boost,

, Smart Cache,

. * Core i7-48xxHQ, i7-49xxHQ, and all EQ models also support

and Intel TSX-NI * Models with Iris Pro Graphics 5200 also contain "Crystalwell": 128 MB

built at (22 nm) acting as

* Overclocking: i7-4950HQ comes with an unlocked multiplier, allowing users to set the multiplier value higher than shipped value, to facilitate better overclocking. * EQ models support ECC memory * Transistors: *

size: 264 mm + 84 mm

Broadwell microarchitecture (5th generation)

"Broadwell-H" (MCP, quad-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Intel TXT,

, Turbo Boost,

, Smart Cache,

, and

(cTDP) down (47W→37W). * Models with Iris Pro Graphics 6200 also contain "Crystalwell": 128 MB

acting as

* EQ models also support

, Intel TSX-NI, and ECC memory. * Transistors: *

size:

"Broadwell-U" (dual-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache,

(cTDP) down * Core i7-5600U and higher also support

, Intel TXT, and Intel TSX-NI * Transistors: 1.3–1.9 billion *

size: 82–133 mm

Skylake microarchitecture (6th generation)

"Skylake-H" (MCP, quad-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, F16C, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache,

, and

(cTDP) down (45W→35W). * Core i7-6820HQ, Core i7-6920HQ, and embedded models also support

, Intel TXT. * Core i7-6820HK, Core i7-6820HQ, Core i7-6920HQ, and embedded models also support Intel TSX-NI. * Core i7-6820HK features an unlocked multiplier, allowing it to be overclocked. * Transistors: *

size: 122 mm

"Skylake-U" (dual-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache, Intel TSX-NI, and

(cTDP) down * Core i7-6600U and higher also support

, Intel TXT. * Transistors: *

size:

Kaby Lake microarchitecture (7th/8th generation)

"Kaby Lake-H" (quad-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache,

(cTDP) down. * i7-7800 and up also support Intel TSX-NI * i7-7820HQ, i7-7920HQ and embedded models also support

, Intel TXT. *i7-7820HK features an unlocked multiplier, allowing it to be overclocked. * Transistors: TBD *

size: * Embedded models support ECC memory

"Kaby Lake-U" (dual-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache, and

(cTDP).

"Kaby Lake-Y" (dual-core, 14 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, FMA3, SGX, MPX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache, Intel TSX-NI,

, Intel TXT, and

(cTDP).

"Kaby Lake Refresh" (quad-core, 14 nm)

"Kaby Lake-G" (quad-core, 14 nm)

"Amber Lake-Y" (dual-core, 14 nm)

Coffee Lake microarchitecture (8th/9th generation)

"Coffee Lake-U" (quad-core, 14 nm)

"Coffee Lake-H" (hexa-core, 14 nm)

"Coffee Lake-B" (hexa-core, 14 nm)

"Whiskey Lake-U" (quad-core, 14 nm)

"Amber Lake-Y" (quad-core, 14 nm)

Comet Lake microarchitecture (10th generation)

"Comet Lake-H" (14 nm)

"Comet Lake-U" (14 nm)

* i7-10610U, 10810U also support

Sunny Cove microarchitecture (10th generation)

"Ice Lake-U" (quad-core, 10 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, AVX-512, FMA3, SGX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache, DL Boost, and

(cTDP).

"Ice Lake-Y" (quad-core, 10 nm)

* All models support:

, SSE,

, SSE4.1, SSE4.2, AVX,

, AVX-512, FMA3, SGX, Enhanced Intel

Technology (EIST),

, XD bit (an

implementation),

, Turbo Boost,

, Smart Cache, DL Boost, and

(cTDP).

Willow Cove microarchitecture (11th generation)

"Tiger Lake-H" (10 nm SuperFin)

* All models support: SSE4.1, SSE4.2,

, AVX-512, FMA3, Speed Shift Technology (SST),

, Turbo Boost,

, Smart Cache, DL Boost, Optane memory, GNA 2.0, IPU6, TB4, and

(cTDP). * 11850H also supports

, Intel TXT.

"Tiger Lake-B" (10 nm SuperFin)

"Tiger Lake-H35" (10 nm SuperFin)

* All models support: SSE4.1, SSE4.2,

, AVX-512, FMA3, Speed Shift Technology (SST),

, Turbo Boost,

, Smart Cache, DL Boost, Optane memory, GNA 2.0, IPU6, TB4, and

(cTDP).

"Tiger Lake-UP3" (10 nm SuperFin)

* All models support: SSE4.1, SSE4.2,

, AVX-512, FMA3, Speed Shift Technology (SST),

, Turbo Boost,

, Smart Cache, DL Boost, Optane memory, GNA 2.0, IPU6 (except SRK02), TB4, and

(cTDP). * 1185G7, 1185G7E and 1185GRE also support

, Intel TXT. * -RE models support

ECC memory Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct n-bit data corruption which occurs in memory. ECC memory is used in most computers where data corruption c ...

"Tiger Lake-UP4" (10 nm SuperFin)

* All models support: SSE4.1, SSE4.2,

, AVX-512, FMA3, Speed Shift Technology (SST),

, Turbo Boost,

, Smart Cache, DL Boost, Optane memory, GNA 2.0, IPU6, TB4, and

(cTDP). * 1180 also supports

, Intel TXT.

Golden Cove Golden Cove is a codename for a CPU microarchitecture developed by Intel and released in November 2021. It succeeds four microarchitectures: Sunny Cove, Skylake, Willow Cove, and Cypress Cove. It is fabricated using Intel's Intel 7 process no ...
+ Gracemont microarchitecture (12th generation)

" Alder Lake-HX" (Intel 7)

* All models support: '' SSE4.1, SSE4.2, AVX,

, FMA3, Speed Shift Technology (SST),

, XD bit (an

implementation),

, Turbo Boost 3.0,

, Smart Cache, Thread Director, DL Boost, and GNA 3.0''. * All models support up to

-4800 or

-3200 memory, and 20 lanes of

5.0/4.0. * 12850HX also supports ''

, Intel TXT''

" Alder Lake-H" (Intel 7)

* All models support: '' SSE4.1, SSE4.2, AVX,

, FMA3, Speed Shift Technology (SST),

, XD bit (an

implementation),

, Turbo Boost 3.0,

, Smart Cache, Thread Director, DL Boost, and GNA 3.0''. * All models support up to

-4800, LPDDR5-5200,

-3200, or

LPDDR4X Low-Power Double Data Rate (LPDDR), also known as LPDDR SDRAM, is a type of synchronous dynamic random-access memory that consumes less power and is targeted for mobile computers and devices such as mobile phones. Older variants are also known a ...

-4266 memory, and 28 lanes of

4.0/3.0.