The launch of the System/360 family introduced IBM\'s Solid Logic Technology (SLT) , a new technology that was the start of more powerful but smaller computers.
The slowest System/360 model announced in 1964, the Model 30 , could
perform up to 34,500 instructions per second, with memory from 8 to 64
KB . High performance models came later. The 1967
The chief architect of System/360 was Gene Amdahl , and the project was managed by Fred Brooks , responsible to Chairman Thomas J. Watson Jr. The commercial release was piloted by another of Watson's lieutenants, John R. Opel , who managed the launch of IBM’s System 360 mainframe family in 1964.
Application level compatibility (with some restrictions) for System/360 software is maintained to present day with the System z servers.
* 1 System/360 history
* 1.1 A family of computers * 1.2 Models * 1.3 Backward compatibility * 1.4 Successors and variants * 1.5 Table of System/360 models
* 2 Technical description
* 2.1 Influential features * 2.2 Architectural overview
* 2.3 Channels
* 2.3.1 Byte-multiplexor and selector channels * 2.3.2 Block multiplexer channel
* 2.4 Basic hardware components * 2.5 Operating system software
* 3 Component names
* 4 Peripherals
* 4.1 Direct access storage devices (DASD) * 4.2 Tape drives * 4.3 Unit record devices
* 5 Remaining machines
* 6 Summary of models announced but never shipped
* 6.1 Summary of models shipped
* 7 Gallery
* 11 References
* 12 External links
A FAMILY OF COMPUTERS
Contrasting with at-the-time normal industry practice,
This flexibility greatly lowered barriers to entry. With other vendors (with the notable exception of ICT ), customers had to choose between machines they could outgrow and machines that were potentially overpowered (and thus too expensive). This meant that many companies simply did not buy computers.
The initial announcement in 1964 included Models 30 , 40 , 50 , 60,
62, and 70. The first three were low- to middle-range systems aimed at
Later additions to the low-end included models 20 (1966, mentioned above), 22 (1971), and 25 (1968). The Model 20 had several sub-models; sub-model 5 was at the higher end of the model. The Model 22 was a recycled Model 30 with minor limitations: a smaller maximum memory configuration, and slower I/O channels, which limited it to slower and lower-capacity disk and tape devices than on the 30.
The Model 44 (1966) was a specialized model, designed for scientific
computing and for real-time computing and process control, featuring
some additional instructions, and with all storage-to-storage
instructions and five other complex instructions eliminated. This
image of the
A succession of high-end machines included the Model 67 (1966, mentioned below, briefly anticipated as the 64 and 66 ), 85 (1969), 91 (1967, anticipated as the 92), 95 (1968), and 195 (1971). The 85 design was intermediate between the System/360 line and the follow-on System/370 and was the basis for the 370/165. There was a System/370 version of the 195, but it did not include Dynamic Address Translation.
The implementations differed substantially, using different native data path widths, presence or absence of microcode, yet were extremely compatible. Except where specifically documented, the models were architecturally compatible. The 91 , for example, was designed for scientific computing and provided out-of-order instruction execution (and could yield "imprecise interrupts" if a program trap occurred while several instructions were being read), but lacked the decimal instruction set used in commercial applications. New features could be added without violating architectural definitions: the 65 had a dual-processor version (M65MP) with extensions for inter-CPU signalling; the 85 introduced cache memory. Models 44, 75, 91, 95, and 195 were implemented with hardwired logic, rather than microcoded as all other models.
The Model 67 , announced in August 1965, was the first production IBM
system to offer dynamic address translation hardware to support
time-sharing . "DAT" is now more commonly referred to as an MMU . An
experimental one-off unit was built based on a model 40. Before the
IBM's existing customers had a large investment in software that
executed on second generation machines. Many models offered the option
of emulation of the customer's previous computer (e.g. the
SUCCESSORS AND VARIANTS
System/360 (excepting the Model 20) was replaced by the compatible
System/370 range in 1970 and Model 20 users were targeted to move to
Computers that were mostly identical or compatible in terms of the
machine code or architecture of the System/360 included Amdahl 's 470
family (and its successors), Hitachi mainframes, the
series , Fujitsu as the Facom, the
TABLE OF SYSTEM/360 MODELS
MODEL ANNOUNCED SHIPPED Scientific performance (kIPS) Commercial performance (kIPS) CPU Bandwidth (MB/sec) Memory bandwidth (MB/sec) Memory size (in (binary ) KB) NOTES
30 Apr 1964 Jun 1965 10.2 29 1.3 0.7 8-64
40 Apr 1964 Apr 1965 40 75 3.2 0.8 16-256
60 - 62 Apr 1964 never
Replaced by Model 65
70 Apr 1964 never
Replaced by Model 75
90 Apr 1964 never
Replaced by Model 92
92 Aug 1964 never
20 Nov 1964 Mar 1966 2.0 2.6
4-32 16-bit, low end, limited partially incompatible instruction set
91 Nov 1964 Oct 1967 1,900 1,800 133 164 1,024-4,096
64 - 66 Apr 1965 never
Replaced by Model 67
65 Apr 1965 Nov 1965 563 567 40 21 128-1,024 Supported LCS
75 Apr 1965 Jan 1966 940 670 41 43 256-1,024 Supported LCS
67 Aug 1965 May 1966
40 21 512-2,048 Dynamic address translation for time sharing
44 Aug 1965 Sep 1966 118 185 16 4.0 32-256 Specialized for scientific computing
95 special order Feb 1968 3,800 est. 3,600 est. 133 711 5,220 Performance estimated as 2× Model 91 per Pugh p. 394
25 Jan 1968 Oct 1968 9.7 25 1.1 2.2 16-48
85 Jan 1968 Dec 1969 3,245 3,418 100 67 512-4,096 16-32 KB cache memory, extended-precision floating point
195 Aug 1969 Mar 1971 10,000 est. 10,000 est. 148 169 1,024-4,096 32 KB IC cache memory. Performance estimated as 3× Model 85 per Pugh p. 422.
22 Apr 1971 Jun 1971
1.3 0.7 24-32 A re-manufactured Model 30
The System/360 introduced a number of industry standards to the marketplace, such as:
8-bit byte (against financial pressure during development to
reduce the byte to 4 or 6 bits), rather than adopting the 7030 concept
of accessing bytes of variable size at arbitrary bit addresses.
* Byte-addressable memory (as opposed to bit-addressable or
* The bus and tag I/O channel standardized in FIPS-60
* Commercial use of microcoded CPUs
The System/360 series had a computer system architecture specification. This specification makes no assumptions on the implementation itself, but rather describes the interfaces and expected behavior of an implementation. The architecture describes mandatory interfaces that must be available on all implementations, and optional interfaces. Some aspects of this architecture are:
* Big endian byte ordering
* A processor with
* 16 32-bit general purpose registers (R0-R15)
* A 64-bit program status word (PSW), which describes (among other things)
* Interrupt masks * Privilege states * A condition code * A 24-bit instruction address
* An interruption mechanism, maskable and unmaskable interruption classes and subclasses * An instruction set . Each instruction is wholly described and also defines the conditions under which an exception is recognized in the form of program interruption.
* A memory (called storage) subsystem with
* 8 bits per byte * A special processor communication area starting at address 0 * 24-bit addressing
* Manual control operations that allow
* A bootstrap process (a process called Initial Program Load or IPL) * Operator-initiated interrupts * Resetting the system * Basic debugging facilities * Manual display and modifications of the system's state (memory and processor)
* An Input/Output mechanism - which does not describe the devices themselves
Some of the optional features are:
All models of System/360, except for the Model 20 and Model 44, implemented that specification.
Binary arithmetic and logical operations are performed as register-to-register and as memory-to-register/register-to-memory as a standard feature. If the Commercial Instruction Set option was installed, packed decimal arithmetic could be performed as memory-to-memory with some memory-to-register operations. The Scientific Instruction Set feature, if installed, provided access to four floating point registers that could be programmed for either 32-bit or 64-bit floating point operations. The Models 85 and 195 could also operate on 12 8-bit extended-precision floating point numbers stored in pairs of floating point registers, and software provided emulation in other models. The System/360 used an 8-bit byte, 32-bit word, 64-bit double-word, and 4-bit nibble . Machine instructions had operators with operands, which could contain register numbers or memory addresses. This complex combination of instruction options resulted in a variety of instruction lengths and formats.
Memory addressing was accomplished using a base-plus-displacement scheme, with registers 1 through F (15). A displacement was encoded in 12 bits, thus allowing a 4096-byte displacement (0-4095), as the offset from the address put in a base register.
Register 0 could not be used as a base register nor as an index register (nor as a branch address register), as "0" was reserved to indicate an address in the first 4 KB of memory, that is, if register 0 was specified as described, the value 0x00000000 was implicitly input to the effective address calculation in place of whatever value might be contained within register 0 (or if specified as a branch address register, then no branch was taken, and the content of register 0 was ignored, but any side effect of the instruction was performed).
This specific behavior permitted initial execution of an interrupt routines, since base registers would not necessarily be set to 0 during the first few instruction cycles of an interrupt routine. It isn't needed for IPL ("Initial Program Load" or boot), as one can always clear a register without the need to save it.
With the exception of the Model 67, all addresses were real memory
Virtual memory was not available in most
The System/360 machine-code instructions are 2 bytes long (no memory operands), 4 bytes long (one operand), or 6 bytes long (two operands). Instructions are always situated on 2-byte boundaries.
Operations like MVC (Move-Characters) (Hex: D2) can only move at most 256 bytes of information. Moving more than 256 bytes of data required multiple MVC operations. (The System/370 series introduced a family of more powerful instructions such as the MVCL "Move-Characters-Long" instruction, which supports moving up to 16 MB as a single block.)
An operand is two bytes long, typically representing an address as a 4-bit nibble denoting a base register and a 12-bit displacement relative to the contents of that register, in the range 000–FFF (shown here as hexadecimal numbers). The address corresponding to that operand is the contents of the specified general-purpose register plus the displacement. For example, an MVC instruction that moves 256 bytes (with length code 255 in hexadecimal as FF) from base register 7, plus displacement 000, to base register 8, plus displacement 001, would be coded as the 6-byte instruction "D2FF 8001 7000" (operator/length/address1/address2).
The System/360 was designed to separate the system state from the problem state. This provided a basic level of security and recoverability from programming errors. Problem (user) programs could not modify data or program storage associated with the system state. Addressing, data, or operation exception errors made the machine enter the system state through a controlled routine so the operating system could try to correct or terminate the program in error. Similarly, it could recover certain processor hardware errors through the machine check routines.
See also: Channel I/O
Peripherals interfaced to the system via channels. A channel was a specialized processor with the instruction set optimized for transferring data between a peripheral and main memory. In modern terms, this could be compared to direct memory access (DMA).
Byte-multiplexor And Selector Channels
There were initially two types of channels; byte-multiplexer channels
(known at the time simply as "multiplexor channels"), for connecting
"slow speed" devices such as card readers and punches, line printers ,
and communications controllers, and selector channels for connecting
high speed devices, such as disk drives , tape drives , data cells and
drums . Every System/360 (except for the Model 20, which was not a
standard 360) had a byte-multiplexer channel and 1 or more selector
channels. The smaller models (up to the model 50) had integrated
channels, while for the larger models (model 65 and above) the
channels were large separate units in separate cabinets, such as the
The byte-multiplexer channel was able to handle I/O to/from several devices simultaneously at the device's highest rated speeds, hence the name, as it multiplexed I/O from those devices onto a single data path to main memory. Devices connected to a byte-multiplexer channel were configured to operate in 1-byte, 2-byte, 4-byte, or "burst" mode. The larger "blocks" of data were used to handle progressively faster devices. For example, a 2501 card reader operating at 600 cards per minute would be in 1-byte mode, while a 1403-N1 printer would be in burst mode. Also, the byte-multiplexer channels on larger models had an optional selector subchannel section that would accommodate tape drives. The byte-multiplexor's channel address was typically "0" and the selector subchannel addresses were from "C0" to "FF." Thus, tape drives on System/360 were commonly addressed at 0C0-0C7. Other common byte-multiplexer addresses were: 00A: 2501 Card Reader, 00C/00D: 2540 Reader/Punch, 00E/00F: 1403-N1 Printers, 010-013: 3211 Printers, 020-0BF: 2701/2703 Telecommunications Units. These addresses are still commonly used in z/VM virtual machines.
System/360 models 40 and 50 had an integrated 1052-7 console that was
usually addressed as 01F, however, this was not connected to the
byte-multiplexer channel, but rather, had a direct internal connection
to the mainframe. The model 30 attached a different model of 1052
through a 1051 control unit. The models 60 through 75 also used the
1052-7. Cable used as Bus or Tag cable for
The initial use for this was the 2305 fixed-head disk, which had 8 "exposures" (alias addresses) and rotational position sensing (RPS). They were standard on the System/370 and thereafter.
Block multiplexer channels could operate as a selector channel to allow compatible attachment of legacy subsystems.
BASIC HARDWARE COMPONENTS
Many SLT cards plugged into an SLT board.
Being somewhat uncertain of the reliability and availability of the
then new monolithic integrated circuits ,
A number of these SLT modules were then mounted onto a small multi-layer printed circuit "SLT card". Each card had one or two sockets on one edge that plugged onto pins on one of the computer's "SLT boards". This was the reverse of how most other company's cards were mounted, where the cards had pins which plugged into sockets on the computer's boards.
Up to twenty SLT boards could be assembled side-by-side (vertically and horizontally) to form a "logic gate". Several gates mounted together constituted a box-shaped "logic frame". The outer gates were generally hinged along one vertical edge so they could be swung open to provide access to the fixed inner gates. The larger machines could have more than one frame bolted together to produce the final unit, such as a multi-frame Central Processing Unit (CPU).
OPERATING SYSTEM SOFTWARE
Main article: System/360 operating systems
The smaller System/360 models used the Basic Operating System/360 (BOS/360) , Tape Operating System (TOS/360), or Disk Operating System/360 (DOS/360, which evolved into DOS/VS, DOS/VSE, VSE/AF, VSE/SP, VSE/ESA, and then z/VSE ).
The larger models used Operating System/360 (OS/360).
When it announced the Model 67 in August 1965,
CP-67, the original virtual machine system, was also known as CP/CMS
. CP/67 was developed outside the
The Model 20 offered a simplified and rarely used tape-based system called TPS (Tape Processing System), and DPS (Disk Processing System) that provided support for the 2311 disk drive. TPS could run on a machine with 8 KB of memory; DPS required 12 KB, which was pretty hefty for a Model 20. Many customers ran quite happily with 4 KB and CPS (Card Processing System). With TPS and DPS, the card reader was used to read the Job Control Language cards that defined the stack of jobs to run and to read in transaction data such as customer payments. The operating system was held on tape or disk, and results could also be stored on the tapes or hard drives. Stacked job processing became an exciting possibility for the small but adventurous computer user.
A little known and little used suite of 80 column punched-card utility programs known as Basic Programming Support (BPS) (jocularly: Barely Programming Support), a precursor of TOS, was available for smaller systems.
Power supplies and other equipment intimately associated with
processors, for example the
Direct-access storage devices, for example the
In addition, System/360 computers could use certain peripherals that
were originally developed for earlier computers. These earlier
peripherals used a different numbering system, such as the
Also available were optical character recognition (OCR) readers IBM
Most small systems were sold with an
DIRECT ACCESS STORAGE DEVICES (DASD)
The first disk drives for System/360 were
The 156 KB/second 2302 was based on the earlier 1302 and was available as a model 3 with two 112.79 MB modules :60 or as a model 4 with four such modules. :60
The 2311, with a removable 1316 disk pack , was based on the
In 1966, the first 2314s shipped. This device had up to eight usable
disk drives with an integral control unit; there were nine drives, but
one was reserved as a spare. Each drive used a removable 2316 disk
pack with a capacity of nearly 28 MB. The disk packs for the 2311 and
2314 were physically large by today's standards — e.g., the 1316
disk pack was about 14 in (36 cm) in diameter and had six platters
stacked on a central spindle. The top and bottom outside platters did
not store data. Data were recorded on the inner sides of the top and
bottom platters and both sides of the inner platters, providing 10
recording surfaces. The 10 read/write heads moved together across the
surfaces of the platters, which were formatted with 203 concentric
tracks. To reduce the amount of head movement (seeking), data was
written in a virtual cylinder from inside top platter down to inside
bottom platter. These disks were not usually formatted with
fixed-sized sectors as are today's hard drives (though this was done
CP/CMS ). Rather, most System/360 I/O software could customize
the length of the data record (variable-length records), as was the
case with magnetic tapes.
Some of the most powerful early System/360s used high-speed
head-per-track drum storage devices. The 3,500 RPM 2301, which
replaced the 7320, was part of the original System/360 announcement,
with a capacity of 4 MB. The 303.8 KB/second
The 6,000 RPM 2305 appeared in 1970, with capacities of 5 MB (2305-1) or 11 MB (2305-2) per module. Although these devices did not have large capacity, their speed and transfer rates made them attractive for high-performance needs. A typical use was overlay linkage (e.g. for OS and application subroutines) for program sections written to alternate in the same memory regions. Fixed head disks and drums were particularly effective as paging devices on the early virtual memory systems. The 2305, although often called a "drum" was actually a head-per-track disk device, with 12 recording surfaces and a data transfer rate up to 3 MB per second.
Rarely seen was the
The Model 44 was unique in offering an integrated single-disk drive as a standard feature. This drive used the 2315 "ramkit" cartridge and provided 1,171,200 bytes of storage. :11
The 2400 tape drives consisted of a combined drive and control unit,
plus individual 1/2" tape drives attached. With System/360, IBM
UNIT RECORD DEVICES
Punched card devices included the 2501 card reader and the 2540
card reader punch. Virtually every System/360 had a 2540. The 2560
MFCM ("Multi-Function Card Machine") reader/sorter/punch, listed
above, was for the Model 20 only. It was notorious for reliability
problems (earning humorous acroymns often involving "...Card Muncher"
or "Mal-Function Card Machine").
* Line printers were the
Few of these machines remain. Despite being sold or leased in very large numbers for a mainframe system of its era, only a few System/360 computers still exist, and few of them still run. Most machines were scrapped when they could no longer profitably be leased, certainly for the value of the gold and other precious metal content of their circuits but possibly also to keep these machines from competing with IBM's newer computers, such as the System/370 . As with all classic mainframe systems, complete System/360 computers were prohibitively large to put in storage, and too expensive to maintain.
Smithsonian Institution owns a Model 65 , though it is no longer
on public display. The
Computer History Museum
The Living Computer Museum has a Model 20 running, with emulated card reader and punch, on public display.
SUMMARY OF MODELS ANNOUNCED BUT NEVER SHIPPED
Six of the twenty
* Models 60, 62, 70: announced along with the Models 30, 40 and 50. The 60 and 62 were replaced by the Model 65, the 70 by the 75. * Models 64 and 66: These were replaced by the Model 67. * What was planned as the Model 70 was replaced by the Model 75. * What was planned as the Model 92 was replaced by the Model 91.
SUMMARY OF MODELS SHIPPED
Fourteen of the twenty
This gallery shows the operator's console , with register value lamps, toggle switches (middle of pictures), and "emergency pull " switch (upper right of pictures) of the various models.
Model 30 *
Model 40 *
Model 50 *
Model 67 *
Model 85 *
"Mad Men" (TV Series: 2007-2016): The "
* ^ The
* ^ "
* Pugh, Emerson W.; Johnson, Lyle R.; Palmer, John H. (1991) IBM\'s
360 and Early 370 Systems, Cambridge:
* Amdahl, G. M. ; Blaauw, G. A. ; Brooks, F. P. (1964).
"Architecture of the
* Blaauw, G. A. ; Brooks, F. P. (1964). "The structure of
SYSTEM/360: Part I—Outline of the logical structure".