Altera Hardware Description Language (AHDL) is a proprietary

hardware description language In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, usually to design application-specific integrated circuits (ASICs) and to progra ...

(HDL) developed by Altera Corporation. AHDL is used for

digital logic A logic gate is a device that performs a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, one that has, for ...

design entry for Altera's

complex programmable logic device A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementing ...

s (CPLDs) and field-programmable gate arrays (FPGAs). It is supported by Altera's MAX-PLUS and

Quartus Quartus () was an early Christian saint who is mentioned in the Bible. According to church tradition, he is known as Quartus of Berytus and is numbered among the Seventy Disciples. Furthermore, he was Bishop of Beirut and suffered for the fai ...

series of design software. AHDL has an Ada-like syntax, while its feature set is comparable to the synthesizable portions of the

Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits, with the highest level of abstraction being at the re ...

and

VHDL VHDL (Very High Speed Integrated Circuit Program, VHSIC Hardware Description Language) is a hardware description language that can model the behavior and structure of Digital electronics, digital systems at multiple levels of abstraction, ran ...

hardware description languages. In contrast to HDLs such as Verilog and VHDL, AHDL is a design-entry language only; all of its language constructs are synthesizable. By default, Altera software expects AHDL source files to have a .tdf extension (Text Design Files).

Example

% a simple AHDL up counter, released to public domain 13 November 2006 %
%  lock quotations achieved with percent sign%
% like c, ahdl functions must be prototyped %

% PROTOTYPE:
 FUNCTION COUNTER (CLK)
	RETURNS (CNTOUT ..0; %

% function declaration, where inputs, outputs, and
bidirectional pins are declared %
% also like c, square brackets indicate an array %

SUBDESIGN COUNTER
(
	CLK		:INPUT;
	CNTOUT ..0:OUTPUT;
)

% variables can be anything from flip-flops (as in this case),
tri-state buffers, state machines, to user defined functions %

VARIABLE
	TIMER ..0 DFF;

% as with all hardware description languages, think of this
 less as an algorithm and more as wiring nodes together %

BEGIN
	DEFAULTS

		TIMER[].prn = VCC; %  this takes care of d-ff resets %
		TIMER[].clrn = VCC;
	END DEFAULTS;

	TIMER[].d = TIMER[].q + H"1";
END;

References

* Scarpino, Frank A., ''VHDL and AHDL Digital System Implementation''. Prentice Hall PTR, 1998. Hardware description languages {{electronics-stub