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Structured ASIC Platform
STRUCTURED ASIC is an intermediate technology between ASIC and FPGA , offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. In a FPGA, interconnects and logic blocks are programmable after fabrication, offering high flexibility of design and ease of debugging in prototyping. However, the capability of FPGAs to implement large circuits is limited, in both size and speed, due to complexity in programmable routing, and significant space occupied by programming elements, e.g. SRAMs, MUXes. On the other hand, ASIC design flow is expensive. Every different design needs a complete different set of masks. The Structured ASIC is a solution between these two. It has basically the same structure as a FPGA, but being mask-programmable instead of field-programmable, by configuring one or several via layers between metal layers. Every SRAM configuration bit can be replaced by a choice of putting a via or not between metal contacts. A number of commercial vendors have introduced structured ASIC products. They have a wide range of configurability, from a single via layer to 6 metal and 6 via layers. Altera's Hardcopy-II, eASIC's Nextreme are examples of commercial structured ASICs
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Application-specific Integrated Circuit
An APPLICATION-SPECIFIC INTEGRATED CIRCUIT (ASIC) /ˈeɪsɪk/ , is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. For example, a chip designed to run in a digital voice recorder or a high-efficiency Bitcoin miner is an ASIC. Application-specific standard products (ASSPs) are intermediate between ASICs and industry standard integrated circuits like the 7400 or the 4000 series . As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 gates to over 100 million. Modern ASICs often include entire microprocessors , memory blocks including ROM , RAM , EEPROM , flash memory and other large building blocks. Such an ASIC is often termed a SoC (system-on-chip ). Designers of digital ASICs often use a hardware description language (HDL), such as Verilog or VHDL , to describe the functionality of ASICs. Field-programmable gate arrays (FPGA) are the modern-day technology for building a breadboard or prototype from standard parts; programmable logic blocks and programmable interconnects allow the same FPGA to be used in many different applications. For smaller designs or lower production volumes, FPGAs may be more cost effective than an ASIC design even in production
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FPGA
A FIELD-PROGRAMMABLE GATE ARRAY (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence "field-programmable ". The FPGA configuration is generally specified using a hardware description language (HDL), similar to that used for an application-specific integrated circuit (ASIC). (Circuit diagrams were previously used to specify the configuration, as they were for ASICs, but this is increasingly rare.) A Spartan FPGA from Xilinx
Xilinx
FPGAs contain an array of programmable logic blocks , and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together", like many logic gates that can be inter-wired in different configurations. Logic blocks can be configured to perform complex combinational functions , or merely simple logic gates like AND and XOR . In most FPGAs, logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory
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Non-recurring Engineering
NON-RECURRING ENGINEERING (NRE) refers to the one-time cost to research , design , develop and test a new product or product enhancement. When budgeting for a new product, NRE must be considered to analyze if a new product will be profitable . Even though a company will pay for NRE on a project only once, NRE costs can be prohibitively high and the product will need to sell well enough to produce a return on the initial investment. NRE is unlike production costs , which must be paid constantly to maintain production of a product. It is a form of fixed cost in economics terms. Once a system is designed any number of units can be manufactured without increasing NRE cost. In a project-type (manufacturing) company, large parts (possibly all) of the project represent NRE. In this case the NRE costs are likely to be included in the first project's costs, this can also be called research and development (R right: 15px; display: none;"> * v * t * e Retrieved from "https://en.wikipedia.org/w/index.php?title=Non-recurring_engineering additional terms may apply. By using this site, you agree to the Terms of Use and Privacy Policy .® is a registered trademark of the Wikimedia Foundation, Inc
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Gate Array
A GATE ARRAY or UNCOMMITTED LOGIC ARRAY (ULA) is an approach to the design and manufacture of application-specific integrated circuits (ASICs), using a prefabricated chip with active devices like NAND-gates, that are later interconnected according to a custom order by adding metal layers in the factory. DESIGNA gate array circuit is a prefabricated silicon chip circuit with no particular function, in which transistors , standard NAND or NOR logic gates , and other active devices are placed at regular predefined positions and manufactured on a wafer , usually called a _master slice_. Creation of a circuit with a specified function is accomplished by adding a final surface layer or layers of metal interconnects to the chips on the master slice late in the manufacturing process, joining these elements to allow the function of the chip to be customized as desired. This layer is analogous to the copper layer(s) of a printed circuit board (PCB). Gate array
Gate array
master slices are usually prefabricated and stockpiled in large quantities regardless of customer orders. The design and fabrication according to the individual customer specifications may be finished in a shorter time compared with standard cell or full custom design. The gate array approach reduces the mask costs, since fewer custom masks need to be produced
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Altera
ALTERA CORPORATION is an Intel
Intel
-owned American manufacturer of programmable logic devices (PLDs), reconfigurable complex digital circuits. The company is a wholly owned subsidiary of Intel
Intel
. Altera released its first PLD in 1984. Altera's main products are the Stratix , Arria and Cyclone series FPGAs , the MAX series CPLDs , Quartus II design software, and Enpirion PowerSoC DC-DC power solutions. Altera
Altera
and Intel
Intel
announced on June 1, 2015 that they have agreed that Intel
Intel
would acquire Altera
Altera
in an all-cash transaction valued at approximately $16.7 billion. As of December 28, 2015, the acquisition had been completed. CONTENTS* 1 Products * 1.1 FPGAs * 1.2 SoC FPGAs * 1.3 PowerSoC * 1.4 ASICs * 1.5 IP cores * 1.6 Design software * 2 Technology * 2.1 40-nm technology * 2.2 28-nm technology * 2.3 14-nm technology * 3 Competition * 4 Restatement * 5 Acquisition by Intel
Intel
* 6 References * 7 External links PRODUCTSFPGASThe Stratix series FPGAs are the company's largest, highest bandwidth devices, with up to 1.1 million logic elements, integrated transceivers at up to 28 Gbit/s, up to 1.6 Tbit/s of serial switching capability, up to 1,840 GMACs of signal-processing performance, and up to 7 x72 DDR3 memory interfaces at 800 MHz
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EASIC
EASIC
EASIC
is a fabless semiconductor company offering NEW ASIC devices used in the production of customized silicon devices. HISTORYIn 1999 eASIC Corporation was founded in San Jose, California
San Jose, California
, and incorporated in Delaware by Zvi Or-Bach, the founder of Chip Express (renamed to ChipX). eASIC is a privately held company, headquartered in Santa Clara , California, with engineering and R&D teams in Romania and Malaysia
Malaysia

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Special
SPECIAL or SPECIALS may refer to: CONTENTS * 1 Music * 2 Film and television * 3 Other uses * 4 See also MUSIC * _Special_ (album) , a 1992 album by Vesta Williams * "Special" (Garbage song) , 1998 * "Special" (Mew song) , 2005 * "Special" (Stephen Lynch song) , 2000 * The Specials , a British band * "Special", a song by Violent Femmes on _The Blind Leading the Naked _ * "Special", a song on _ The Documentary _ album by GameFILM AND TELEVISION * Special (lighting) , a stage light that is used for a single, specific purpose * "Special" (Lost) , an episode of the television series _Lost_ * _Special_ (film) * _The Specials_ (film) * Television special , television programming that temporarily replaces scheduled programmingOTHER USES * A special price, a form of discounts and allowances * A kit car or one-off home built vehicle * A euphemi
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Structured ASIC Platform
STRUCTURED ASIC is an intermediate technology between ASIC and FPGA , offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using Structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. In a FPGA, interconnects and logic blocks are programmable after fabrication, offering high flexibility of design and ease of debugging in prototyping. However, the capability of FPGAs to implement large circuits is limited, in both size and speed, due to complexity in programmable routing, and significant space occupied by programming elements, e.g. SRAMs, MUXes. On the other hand, ASIC design flow is expensive. Every different design needs a complete different set of masks. The Structured ASIC is a solution between these two. It has basically the same structure as a FPGA, but being mask-programmable instead of field-programmable, by configuring one or several via layers between metal layers. Every SRAM configuration bit can be replaced by a choice of putting a via or not between metal contacts. A number of commercial vendors have introduced structured ASIC products. They have a wide range of configurability, from a single via layer to 6 metal and 6 via layers. Altera's Hardcopy-II, eASIC's Nextreme are examples of commercial structured ASICs
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The 1983 ATLANTIC HURRICANE SEASON was the least active Atlantic hurricane season in 53 years. Although the season begins by convention on June 1, there were n