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Joint Test Action Group
JTAG
JTAG
(named after the Joint Test Action Group
Joint Test Action Group
which codified it) is an industry standard for verifying designs and testing printed circuit boards after manufacture. JTAG
JTAG
implements standards for on-chip instrumentation in electronic design automation (EDA) as a complementary tool to digital simulation.[1] It specifies the use of a dedicated debug port implementing a serial communications interface for low-overhead access without requiring direct external access to the system address and data buses. The interface connects to an on-chip test access port (TAP) that implements a stateful protocol to access a set of test registers that present chip logic levels and device capabilities of various parts. The Joint Test Action Group
Joint Test Action Group
formed in 1985 to develop a method of verifying designs and testing printed circuit boards after manufacture
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Technical Standard
A technical standard is an established norm or requirement in regard to technical systems. It is usually a formal document that establishes uniform engineering or technical criteria, methods, processes and practices. In contrast, a custom, convention, company product, corporate standard, and so forth that becomes generally accepted and dominant is often called a de facto standard. A technical standard may be developed privately or unilaterally, for example by a corporation, regulatory body, military, etc. Standards can also be developed by groups such as trade unions, and trade associations. Standards organizations
Standards organizations
often have more diverse input and usually develop voluntary standards: these might become mandatory if adopted by a government (i.e
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Serial Communications
In telecommunication and data transmission, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels. Serial communication
Serial communication
is used for all long-haul communication and most computer networks, where the cost of cable and synchronization difficulties make parallel communication impractical. Serial computer buses are becoming more common even at shorter distances, as improved signal integrity and transmission speeds in newer serial technologies have begun to outweigh the parallel bus's advantage of simplicity (no need for serializer and deserializer, or SerDes) and to outstrip its disadvantages (clock skew, interconnect density)
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Programmer (hardware)
Pocket Programmer Galep-5 with a ZIF socketSuperPro6100: USB
USB
interfaced stand alone Universal Programmer with plug-in Adapter BoardProgrammer (hardware), device programmer, chip programmer, device burner,[1]:364 or PROM writer[2] is an electronic equipment that arrange written software to configure programmable non-volatile integrated circuits, called programmable devices.[3]:3 The target devices include; PROM, EPROM, EEPROM, Flash memory, eMMC, MRAM, FeRAM, NVRAM, PLD, PLA, PAL, GAL, CPLD, FPGA, and MCU. These are terminologies in the field of computer hardware.Contents1 Function 2 Types 3 History 4 Manufactures 5 See also 6 References 7 External linksFunction[edit] JTAG
JTAG
Connector-based On-Board Programmer for AVR microcontroller with USB
USB
Port interfaceProgrammer hardware has two variants. One is configuring the target device itself with a socket on the programmer
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Complex Programmable Logic Device
A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. The main building block of the CPLD is a macrocell, which contains logic implementing disjunctive normal form expressions and more specialized logic operations.[1]Contents1 Features 2 Distinctions 3 See also 4 External links 5 ReferencesFeatures[edit] Some of the CPLD features are in common with PALs:Non-volatile configuration memory. Unlike many FPGAs, an external configuration ROM isn't required, and the CPLD can function immediately on system start-up. For many legacy CPLD devices, routing constrains most logic blocks to have input and output signals connected to external pins, reducing opportunities for internal state storage and deeply layered logic. This is usually not a factor for larger CPLDs and newer CPLD product families.Other features are in common with FPGAs:Large number of gates available
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Flash Memory
Flash memory
Flash memory
is an electronic (solid-state) non-volatile computer storage medium that can be electrically erased and reprogrammed. Toshiba
Toshiba
developed flash memory from E EPROM
EPROM
(electrically erasable programmable read-only memory) in the early 1980s and introduced it to the market in 1984. The two main types of flash memory are named after the NAND and NOR logic gates. The individual flash memory cells exhibit internal characteristics similar to those of the corresponding gates. While EPROMs had to be completely erased before being rewritten, NAND-type flash memory may be written and read in blocks (or pages) which are generally much smaller than the entire device
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Test Case
A test case is a specification of the inputs, execution conditions, testing procedure, and expected results that define a single test to be executed to achieve a particular software testing objective, such as to exercise a particular program path or to verify compliance with a specific requirement.[1] Test cases underlie testing that is methodical rather than haphazard. A battery of test cases can be built to produce the desired coverage of the software being tested. Formally defined test cases allow the same tests to be run repeatedly against successive versions of the software, allowing for effective and consistent regression testing.[2]Contents1 Formal test cases 2 Informal test cases 3 Typical written test case format 4 See also 5 References 6 External linksFormal test cases[edit] In order to fully test that all the requirements of an application are met, there must be at least two test cases for each requirement: one positive test and one negative test
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Serial Vector Format
Serial Vector Format (SVF) is a file format that contains boundary scan vectors to be sent to an electronic circuit using a JTAG interface. Boundary scan
Boundary scan
vectors consist of the following data:Stimulus data: This is data to be sent to a device or electronic circuit Expected response: This is the data the device or circuit is expected to send back if there is no error Mask data: Defines which bits in the expected response are valid; other bits of the device's response are unknown and must be ignored when comparing the expected response and the data returned from the circuit Additional information on how to send the data (e.g. maximum clock frequency)The SVF standard was jointly developed by companies Texas Instruments and Teradyne. Control over the format has been handed off to boundary-scan solution provider ASSET InterTech. The most recent revision is Revision E. SVF files are used to transfer boundary scan data between tools
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Star Network
A Star network
Star network
is one of the most common computer network topologies. In its simplest form, a star network consists of one central hub which acts as a conduit to transmit messages. In star topology, every host is connected to a central hub.[1] A star network is an implementation of a spoke–hub distribution paradigm in computer networks. The hub and hosts, and the transmission lines between them, form a graph with the topology of a star. Data on a star network passes through the hub before continuing to its destination. The hub manages and controls all functions of the network. It also acts as a repeater for the data flow. The star topology reduces the impact of a transmission line failure by independently connecting each host to the hub. Each host may thus communicate with all others by transmitting to, and receiving from, the hub
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Test Probe
A test probe is a physical device used to connect electronic test equipment to a device under test (DUT). Test probes range from very simple, robust devices to complex probes that are sophisticated, expensive, and fragile. Specific types include test prods, oscilloscope probes and current probes
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State Machine
A finite-state machine (FSM) or finite-state automaton (FSA, plural: automata), finite automaton, or simply a state machine, is a mathematical model of computation. It is an abstract machine that can be in exactly one of a finite number of states at any given time. The FSM can change from one state to another in response to some external inputs; the change from one state to another is called a transition. An FSM is defined by a list of its states, its initial state, and the conditions for each transition
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Non-disclosure Agreement
A non-disclosure agreement (NDA), also known as a confidentiality agreement (CA), confidential disclosure agreement (CDA), hush agreement, proprietary information agreement (PIA) or secrecy agreement (SA), is a legal contract between at least two parties that outlines confidential material, knowledge, or information that the parties wish to share with one another for certain purposes, but wish to restrict access to or by third parties. It is a contract through which the parties agree not to disclose information covered by the agreement. An NDA creates a confidential relationship between the parties to protect any type of confidential and proprietary information or trade secrets. As such, an NDA protects non-public business information
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Prototype
A prototype is an early sample, model, or release of a product built to test a concept or process or to act as a thing to be replicated or learned from.[1] It is a term used in a variety of contexts, including semantics, design, electronics, and software programming. A prototype is generally used to evaluate a new design to enhance precision by system analysts and users.[2] Prototyping serves to provide specifications for a real, working system rather than a theoretical one.[3] In some design workflow models, creating a prototype (a process sometimes called materialization) is the step between the formalization and the evaluation of an idea.[4] The word prototype derives from the Greek πρωτότυπον prototypon, "primitive form", neutral of πρωτότυπος prototypos, "original, primitive", from πρῶτος protos, "first" and τύπος typos, "impression".[1][5]Contents1 Basic prototype categories 2 Differences in creating a prototype vs
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Reverse Engineering
Reverse engineering, also called back engineering, is the process of where a man-made object is deconstructed to reveal its designs, architecture, or to extract knowledge from the object
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Star Topology
A Star network
Star network
is one of the most common computer network topologies. In its simplest form, a star network consists of one central hub which acts as a conduit to transmit messages. In star topology, every host is connected to a central hub.[1] A star network is an implementation of a spoke–hub distribution paradigm in computer networks. The hub and hosts, and the transmission lines between them, form a graph with the topology of a star. Data on a star network passes through the hub before continuing to its destination. The hub manages and controls all functions of the network. It also acts as a repeater for the data flow. The star topology reduces the impact of a transmission line failure by independently connecting each host to the hub. Each host may thus communicate with all others by transmitting to, and receiving from, the hub
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Galvanic Isolation
Galvanic isolation
Galvanic isolation
is a principle of isolating functional sections of electrical systems to prevent current flow; no direct conduction path is permitted.[1] Energy or information can still be exchanged between the sections by other means, such as capacitance, induction or electromagnetic waves, or by optical, acoustic or mechanical means. Galvanic isolation
Galvanic isolation
is used where two or more electric circuits must communicate, but their grounds may be at different potentials
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