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Application-specific Integrated Circuit
An Application-Specific Integrated Circuit (ASIC) /ˈeɪsɪk/, is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use. For example, a chip designed to run in a digital voice recorder or a high-efficiency Bitcoin miner is an ASIC. Application-specific standard products (ASSPs) are intermediate between ASICs and industry standard integrated circuits like the 7400 series or the 4000 series. As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) possible in an ASIC has grown from 5,000 logic gates to over 100 million. Modern ASICs often include entire microprocessors, memory blocks including ROM, RAM, EEPROM, flash memory and other large building blocks. Such an ASIC
ASIC
is often termed a SoC (system-on-chip)
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Computer-aided Design
Computer-aided design
Computer-aided design
(CAD) is the use of computer systems (or workstations) to aid in the creation, modification, analysis, or optimization of a design.[1] CAD software is used to increase the productivity of the designer, improve the quality of design, improve communications through documentation, and to create a database for manufacturing.[2] CAD output is often in the form of electronic files for print, machining, or other manufacturing operations. The term CADD (for Computer Aided Design
Design
and Drafting) is also used.[3] Its use in designing electronic systems is known as electronic design automation, or EDA
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Routing (EDA)
In electronic design, wire routing, commonly called simply routing, is a step in the design of printed circuit boards (PCBs) and integrated circuits (ICs). It builds on a preceding step, called placement, which determines the location of each active element of an IC or component on a PCB. After placement, the routing step adds wires needed to properly connect the placed components while obeying all design rules for the IC. The task of all routers is the same. They are given some pre-existing polygons consisting of pins (also called terminals) on cells, and optionally some pre-existing wiring called preroutes. Each of these polygons are associated with a net, usually by name or number. The primary task of the router is to create geometries such that all terminals assigned to the same net are connected, no terminals assigned to different nets are connected, and all design rules are obeyed
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Netlist
In electronic design, a netlist is a description of the connectivity of an electronic circuit. In its simplest form, a netlist consists of a list of the electronic components in a circuit and a list of the nodes they are connected to. A network (net) is a collection of two or more interconnected components. The structure, complexity and representation of netlists can vary considerably, but the fundamental purpose of every netlist is to convey connectivity information. Netlists usually provide nothing more than instances, nodes, and perhaps some attributes of the components involved. If they express much more than this, they are usually considered to be a hardware description language such as Verilog or VHDL, or one of several languages specifically designed for input to simulators. Netlists can be physical or logical, instance-based or net-based, and flat or hierarchical
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Requirements Analysis
In systems engineering and software engineering, requirements analysis encompasses those tasks that go into determining the needs or conditions to meet for a new or altered product or project, taking account of the possibly conflicting requirements of the various stakeholders, analyzing, documenting, validating and managing software or system requirements.[2] Requirements analysis
Requirements analysis
is critical to the success or failure of a systems or software project.[3] The requirements should be documented, actionable, measurable, testable, traceable, related to identified business needs or opportunities, and defined to a level of
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Functional Verification
In electronic design automation, functional verification is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, and takes the majority of time and effort in most large electronic system design projects. Functional verification is a part of more encompassing design verification, which, besides functional verification, considers non-functional aspects like timing, layout and power. Functional verification is very difficult because of the sheer volume of possible testcases that exist in even a simple design. Frequently there are more than 10^80 possible tests to comprehensively verify a design – a number that is impossible to achieve in a lifetime
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Logic Simulation
Logic simulation is the use of simulation software to predict the behavior of digital circuits and hardware description languages. Simulation can be performed at varying degrees of physical abstraction, such as at the transistor level, gate level, register-transfer level (RTL), electronic system-level (ESL), or behavioral level.Contents1 Use in verification 2 Length of simulation 3 Event simulation versus cycle simulation 4 See also 5 ReferencesUse in verification[edit] Logic simulation may be used as part of the verification process in designing hardware. Simulations have the advantage of providing a familiar look and feel to the user in that it is constructed from the same language and symbols used in design
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Formal Verification
In the context of hardware and software systems, formal verification is the act of proving or disproving the correctness of intended algorithms underlying a system with respect to a certain formal specification or property, using formal methods of mathematics.[1] Formal verification can be helpful in proving the correctness of systems such as: cryptographic protocols, combinational circuits, digital circuits with internal memory, and software expressed as source code. The verification of these systems is done by providing a formal proof on an abstract mathematical model of the system, the correspondence between the mathematical model and the nature of the system being otherwise known by construction
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Hardware Emulation
In integrated circuit design, hardware emulation is the process of imitating the behavior of one or more pieces of hardware (typically a system under design) with another piece of hardware, typically a special purpose emulation system. The emulation model is usually based on a hardware description language (e.g. Verilog) source code, which is compiled into the format used by emulation system. The goal is normally debugging and functional verification of the system being designed. Often an emulator is fast enough to be plugged into a working target system in place of a yet-to-be-built chip, so the whole system can be debugged with live data
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Simics
Simics is a full-system simulator used to run unchanged production binaries of the target hardware at high-performance speeds. Simics was originally developed by the Swedish Institute of Computer Science (SICS), and then spun off to Virtutech for commercial development in 1998.[1] Virtutech was acquired by Intel in 2010 and Simics is now marketed through Intel's subsidiary Wind River Systems.[2] Simics can simulate systems such as Alpha, x86-64, IA-64, ARM, MIPS (32- and 64-bit), MSP430, PowerPC (32- and 64-bit), POWER, SPARC-V8 and V9, and x86 CPUs. Many operating systems have been run on various varieties of the simulated hardware, including MS-DOS, Windows, VxWorks, OSE, Solaris, FreeBSD, Linux, QNX, and RTEMS
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Photomask
A photomask is an opaque plate with holes or transparencies that allow light to shine through in a defined pattern. They are commonly used in photolithography.Contents1 Overview 2 Mask Error Enhancement Factor (MEEF) 3 Pellicles 4 Leading commercial photomask manufacturers 5 See also 6 ReferencesOverview[edit]A simulated photomask. The thicker features are the integrated circuit that is desired to be printed on the wafer. The thinner features are assists that do not print themselves, but help the integrated circuit print better out-of-focus. The zig-zag appearance of the photomask is because optical proximity correction was applied to it to create a better print.Lithographic photomasks are typically transparent fused silica blanks covered with a pattern defined with a chrome metal-absorbing film. Photomasks are used at wavelengths of 365 nm, 248 nm, and 193 nm
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Die (integrated Circuit)
A die (pronunciation: /dʌɪ/) in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated. Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon (EGS) or other semiconductor (such as GaAs) through processes such as photolithography. The wafer is cut (“diced”) into many pieces, each containing one copy of the circuit
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Fabrication (semiconductor)
Semiconductor
Semiconductor
device fabrication is the process used to create the integrated circuits that are present in everyday electrical and electronic devices. It is a multiple-step sequence of photolithographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of pure semiconducting material
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Static Timing Analysis
Static timing analysis (STA) is a simulation method of computing the expected timing of a digital circuit without requiring a simulation of the full circuit. High-performance integrated circuits have traditionally been characterized by the clock frequency at which they operate. Gauging the ability of a circuit to operate at the specified speed requires an ability to measure, during the design process, its delay at numerous steps. Moreover, delay calculation must be incorporated into the inner loop of timing optimizers at various phases of design, such as logic synthesis, layout (placement and routing), and in in-place optimizations performed late in the design cycle. While such timing measurements can theoretically be performed using a rigorous circuit simulation, such an approach is liable to be too slow to be practical. Static timing analysis plays a vital role in facilitating the fast and reasonably accurate measurement of circuit timing
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Design Rule Checking
Design rule checking
Design rule checking
or check(s) (DRC) is the area of electronic design automation that determines whether the physical layout of a particular chip layout satisfies a series of recommended parameters called design rules. Design rule checking
Design rule checking
is a major step during physical verification signoff on the design, which also involves LVS (layout versus schematic) check, XOR checks, ERC (electrical rule check) and antenna checks. For advanced processes some fabs also insist upon the use of more restricted rules to improve yield.Contents1 Design rules 2 Software 3 Commercial software 4 Free software 5 ReferencesDesign rules[edit]The basic DRC checks - width, spacing, and enclosureDesign rules are a series of parameters provided by semiconductor manufacturers that enable the designer to verify the correctness of a mask set
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Metallizing
Metallizing is the general name for the technique of coating metal on the surface of objects. Metallic coatings may be decorative, protective or functional Techniques for metallization started as early as mirror making. In 1835, Justus von Liebig discovered the process of coating a glass surface with metallic silver, making the glass mirror one of the earliest items being metallized. Plating other non-metallic objects grew rapidly with introduction of ABS plastic. Because a non-metallic object tends to be a poor electrical conductor, the object's surface must be made conductive before plating can be performed. The plastic part is first etched chemically by a suitable process, such as dipping in a hot chromic acid-sulfuric acid mixture. The etched surface is sensitised and activated by first dipping in tin(II) chloride solution, then palladium chloride solution
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