Vega Processors
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VEGA Microprocessors are a portfolio of indigenous processors developed by
C-DAC The Centre for Development of Advanced Computing (C-DAC) is an Government of India, Indian autonomous scientific society, operating under the Ministry of Electronics and Information Technology. History CDAC was created in November 1987, init ...
. The portfolio includes several 32-bit/64-bit Single/Multi-core Superscalar In-order/Out-of-Order high performance processors based on the RISC-V ISA. Also features India’s first indigenous 64-bit, superscalar, Out-of-order processor which is the main highlight of this portfolio. The Centre for Development of Advanced Computing (C-DAC) is an autonomous Scientific Society, operating under the Ministry of Electronics and Information Technology (MeitY), Govt. of India. The Microprocessor Development Programme (MDP) was initiated and funded by MeitY with the mission objective to design and develop indigenously, a family of Microprocessors, related IPs and the complete ecosystem to enable fully indigenous product development that meets various requirements in the strategic, industrial and commercial sectors. As part of the project C-DAC has successfully developed the VEGA series of microprocessors in soft IP form, which include32-bit Single-core (In-order), 64-bit Single-core (In-order & Out-of-order), 64-bit Dual-core (Out-of-order), and 64-bit Quad-core (Out-of-order). These high-performance processors are based on the open-source RISC-V Instruction Set Architecture. The tape out of some of these processor chips have also been planned. Vega processors are used in “Swadeshi Microprocessor Challenge- Innovate Solutions for # Atmanirbhar Bharat”.


Processor Variants

There are many variants for
vega microprocessors VEGA Microprocessors are a portfolio of indigenous processors developed by C-DAC. The portfolio includes several 32-bit/64-bit Single/Multi-core Superscalar In-order/Out-of-Order high performance processors based on the RISC-V ISA. Also feature ...
, including:


VEGA ET1031

VEGA ET1031 is a compact and efficient 32-bit, 3-stage in-order processor based on RISC-V Instruction Set Architecture. This microprocessor can be used as an effective work horse in low power IoT applications. It is based on RISC-V (RV32IM) Instruction Set Architecture and contains a high-performance multiply/divide unit, configurable AXI4 or AHB external interface, optional MPU (Memory Protection Unit), Platform Level Interrupt Controller and advanced Integrated Debug Controller.


VEGA AS1061

VEGA AS1061 is a 64-bit, 6 stage in-order pipelined processor based on RISC-V 64GC (RV64IMAFDC) Instruction Set Architecture. Its usage mainly aimed at low power embedded applications. The core has a highly optimized 6-stage in-order pipeline with supervisor support and has the capability to boot Linux or other Operating systems. The pipeline is highly configurable and can support the RISC-V RV64 IMAFDC extensions. The AXI or AHB standard interface provided enables ease of system integration and a JTAG interface is provided for debug support. It also supports a highly optimized branch predictor with BTB, BHT and RAS along with Optional Memory Management Unit (MMU), Configurable, L1 caches, Platform Level Interrupt Controller etc.


VEGA AS1161

VEGA AS1161 features an out-of-order processing engine with a 16-stage pipeline enabling it to meet next gen computational requirements. The design supports RISC-V 64G (RV64IMAFD) Instruction Set Architecture in a 13-16 stage out-of-order pipeline implementation. The processor supports single and double precision floating point instructions, and a fully featured memory with Memory Management Unit and Page-based virtual memory for Linux based applications. AS1161 is optimized for high performance, integrating an Advanced branch predictor for efficient branch execution, Instruction and Data caches. Features also include PLIC and vectored interrupts for serving various types of system events. An AXI4- / ACE, AHB- compliant external interface facilitates ease of system integration. There is also a WFI mode for power management, and JTAG debug interface for development support.


VEGA AS2161

VEGA AS2161 features a dual core out-of-order processing engine with a 16-stage pipeline for high performance compute requirements. The design supports RISC-V 64G (RV64IMAFD) Instruction Set Architecture in a 13-16 stage out-of-order pipeline implementation. The processor also supports single and double precision floating point instructions, and MMU for Linux based applications. This high-performance application core comes with advanced branch prediction for efficient branch execution, Instruction and Data caches. This is ideal for applications requiring high-throughput performance e.g., Media server, Single Board Computer, Storage, Networking etc. A Cache coherent interconnect along with a highly optimized L2 cache is also part of the design.


VEGA AS4161

VEGA AS4161 features a quad core out-of-order processing engine with a 16-stage pipeline for high performance compute requirements. The design supports RISC-V 64G (RV64IMAFD) Instruction Set Architecture in a 13-16 stage out-of-order pipeline implementation along with advanced branch prediction unit, L1 Caches, MMU, TLB etc. This is ideal for applications requiring high-throughput performance e.g., Storage, Networking, etc. An AXI4- / ACE, AHB- compliant external interface is used to connect multiple cores to the interconnect and memory subsystem. A Cache coherent interconnect along with a highly optimized L2 cache is a part of the design.


Peripherals

C-DAC has a wide range of System and Peripheral IPs under the brand name ASTRA which are Silicon proven, consisting of the robust RTL, extensively verified and fully synthesizable technology independent IP cores which form the building blocks for an SoC implementation. Some of the peripherals include: *EROTG1 - USB On-the-Go controller *ERUSBHC - USB Host Controller *ERUSB2 - USB Function controller *ERPCIe - PCI Express Endpoint Controller *ERSATAII - SATA Host Controller *ERMAC - Ethernet Media Access Controller (10/100 Mbps) *ERGMAC - Gigabit Ethernet Media Access Controller *ER15530 - Manchester Encoder Decoder core *ERVIC - Vectored Interrupt Controller *ER146818 - Real Time Clock *ERTIMER - Timer *ER16C450 - UART *ERGPIO - General Purpose Input-Output Controller *ERSPIM - Serial Peripheral Interface Master Controller *ERPLIC - Platform Level Interrupt Controller *ERWDT - Watch Dog Timer *ERIIC - Inter-Integrated Circuit Master Controller *ERQSPI - Quad SPI *ERPWM - Pulse Width Modulator *ERSMC - Static Memory Controller (SRAM/NOR/eMMC) *ERDMAC - Direct Memory Access Controller *ERI2S - Integrated Inter-IC Sound Bus *ERDEBUG - RISC-V Debug module *ERSDRAM - SDRAM Controller *ERSDHOST - SD Host Controller *ERDISPLAY - Display Controller *ERAXIBUS - AXI Bus Interconnect *ERAXIAPB - AXI to APB Bus converter


SoCs


THEJAS32

THEJAS32 SoC is built around VEGA ET1031, a 32-bit high performance microcontroller class processor consisting of a 3-stage in-order RISC-V based core. The peripherals available in THEJAS32 SoC are GPIO, Interrupt Controller, Timers, RAM, SPI, UART, I2C, PWM and ADC. This is targeted for applications like sensor fusion, smart meters, small IoT devices, wearable devices, electronic toys, etc. This SoC is ported on to Digilent Artix-7 35T FPGA Development Board, extensively used by the Swadeshi Microprocessor Challenge Participants. Also THEAJS32 SoC ASIC fabricated in SilTerra 130nm technology.


THEJAS64

THEJAS64 SoC is built around VEGA AS1061, a 64-bit processor with a 6-stage in-order pipeline optimized for high performance. This processor consists of an efficient branch predictor and instruction and data caches and is targeted for applications like IoT devices, motor control, wearable devices, high-performance embedded, consumer electronics and industrial automation. The peripherals available in this SoC are GPIO, Interrupt Controller, Timers, DDR3 RAM, SPI, UART, I2C, PWM, ADC and 10/100 Ethernet. This SoC is ported on to Digilent Artix-7 100T, Nexys A7, Genesys2 FPGA Development Boards, extensively used by the Swadeshi Microprocessor Challenge Participants.


VEGA Ecosystem

The proposed SoCs from CDAC will contain Single/Dual/Quad core processor as the core and integrated with in-house developed silicon proven peripheral IPs suitable for various applications like Strategic, Industrial, Automotive, Health, Consumer, etc. The complete ecosystem available for Embedded Systems design with the VEGA processors consists of Board Support Packages, SDK with integrated tool chain, IDE plug-ins and Debugger for the development, testing and debugging. Linux and other standard Operating Systems have been ported and are also available as part of the ecosystem.


Tapeouts


THEJAS32

THEAJS32 ASIC fabricated in SilTerra 130nm technology which operates at a frequency of 100MHz. THEJAS32 SoC includes VEGA ET1031 Microprocessor, 256KB internal SRAM, Three UARTs, Four SPIs, Three TIMERs, Eight PWMs, Three I2C interface, 32 GPIOs etc.


Development Boards


ARIES MICRO v1.0

The ARIES MICRO v1.0 is a high-performance development board with loads of features in a small form factor. This breadboard friendly development platform based on THEAJS32 ASIC which operates at a frequency of 100MHz. Technical Specification


ARIES v2.0

The ARIES v2.0 is a fully indigenous and a “Made in India” product to get started with basic microprocessor programming and embedded systems. This development board is built upon a RISC-V ISA compliant VEGA Processor with easy-to-use hardware and software. Technical Specification


ARIES IoT v1.0

ARIES IoT V1.0 is a feature-rich indigenous hardware platform based on THEAJS32 SoC which includes VEGA ET1031 Microprocessor. This board is targeted for learning and development of Internet of Things applications.


References


External links

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VEGA Processors YouTube channel

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