VMEbus (Versa Module Europa or Versa Module Eurocard bus) is a
computer bus
In computer architecture, a bus (shortened form of the Latin '' omnibus'', and historically also called data highway or databus) is a communication system that transfers data between components inside a computer, or between computers. This ex ...
standard, originally developed for the
Motorola 68000 line of
CPUs
A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, and ...
, but later widely used for many applications and standardized by the
IEC
The International Electrotechnical Commission (IEC; in French: ''Commission électrotechnique internationale'') is an international standards organization that prepares and publishes international standards for all electrical, electronic and r ...
as
ANSI
The American National Standards Institute (ANSI ) is a private non-profit organization that oversees the development of voluntary consensus standards for products, services, processes, systems, and personnel in the United States. The organi ...
/
IEEE
The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operation ...
1014-1987. It is physically based on
Eurocard sizes, mechanicals and connectors (
DIN 41612
DIN 41612 was a DIN standard for electrical connectors that are widely used in rack based electrical systems. Standardisation of the connectors is a pre-requisite for open systems, where users expect components from different suppliers to operat ...
), but uses its own signalling system, which Eurocard does not define. It was first developed in 1981 and continues to see widespread use today.
History
In 1979, during development of the
Motorola 68000 CPU, one of their engineers, Jack Kister, decided to set about creating a standardized bus system for 68000-based systems. The Motorola team brainstormed for days to select the name VERSAbus. VERSAbus cards were large, , and used
edge connector
An edge connector is the portion of a printed circuit board (PCB) consisting of traces leading to the edge of the board that are intended to plug into a matching socket. The edge connector is a money-saving device because it only requires a sin ...
s.
Only a few products adopted it, including the
IBM System 9000
The System 9000 (S9000) is a family of microcomputers from IBM consisting of the System 9001, 9002, and 9003. The first member of the family, the System 9001 laboratory computer, was introduced in May 1982 as the IBM Instruments Computer System ...
instrument controller and the
Automatix
Automatix Inc., founded in January 1980, was the first company to market industrial robots with built-in machine vision. Its founders were Victor Scheinman, inventor of the Stanford arm; Phillippe Villers, Michael Cronin, and Arnold Reinhold o ...
robot and machine vision systems.
![VERSAbus memory card](https://upload.wikimedia.org/wikipedia/commons/f/fa/VERSAbus_memory_card.agr.jpg)
Kister was later joined by John Black, who refined the specifications and created the ''VERSAmodule'' product concept. A young engineer working for Black,
Julie Keahey
Julie may refer to:
* Julie (given name), a list of people and fictional characters with the name
Film and television
* ''Julie'' (1956 film), an American film noir starring Doris Day
* ''Julie'' (1975 film), a Hindi film by K. S. Sethumadhava ...
designed the first VERSAmodule card, the VERSAbus Adaptor Module, used to run existing cards on the new VERSAbus.
Sven Rau and
Max Loesel
Max or MAX may refer to:
Animals
* Max (dog) (1983–2013), at one time purported to be the world's oldest living dog
* Max (English Springer Spaniel), the first pet dog to win the PDSA Order of Merit (animal equivalent of OBE)
* Max (gorilla) ...
of Motorola-Europe added a mechanical specification to the system, basing it on the
Eurocard standard that was then late in the standardization process. The result was first known as VERSAbus-E but was later renamed to ''VMEbus'', for ''VERSAmodule Eurocard bus'' (although some refer to it as ''Versa Module Europa'').
At this point, a number of other companies involved in the 68000's ecosystem agreed to use the standard, including Signetics, Philips, Thomson, and Mostek. Soon it was officially standardized by the
IEC
The International Electrotechnical Commission (IEC; in French: ''Commission électrotechnique internationale'') is an international standards organization that prepares and publishes international standards for all electrical, electronic and r ...
as the IEC 821 VMEbus and by ANSI and IEEE as ANSI/IEEE 1014-1987.
The original standard was a
16-bit bus, designed to fit within the existing Eurocard
DIN connectors. However, there have been several updates to the system to allow wider bus widths. The current ''VME64'' includes a full
64-bit
In computer architecture, 64-bit Integer (computer science), integers, memory addresses, or other Data (computing), data units are those that are 64 bits wide. Also, 64-bit central processing unit, CPUs and arithmetic logic unit, ALUs are those ...
bus in 6U-sized cards and
32-bit
In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32-bit units. Compared to smaller bit widths, 32-bit computers can perform large calculation ...
in 3U cards. The VME64 protocol has a typical performance of 40
MB/s.
Other associated standards have added hot-swapping (
plug-and-play
In computing, a plug and play (PnP) device or computer bus is one with a specification that facilitates the recognition of a hardware component in a system without the need for physical device configuration or user intervention in resolving reso ...
) in ''VME64x'', smaller 'IP' cards that plug into a single VMEbus card, and various interconnect standards for linking VME systems together.
In the late 1990s, synchronous protocols proved to be favourable. The research project was called VME320. The VITA Standards Organization called for a new standard for unmodified VME32/64 backplanes.
The new 2eSST protocol was approved in ANSI/VITA 1.5 in 1999.
Over the years, many extensions have been added to the VME interface, providing 'sideband' channels of communication in parallel to VME itself. Some examples are IP Module, RACEway Interlink, SCSA, Gigabit Ethernet on VME64x Backplanes, PCI Express, RapidIO, StarFabric and InfiniBand.
VMEbus was also used to develop closely related standards,
VXIbus
VME eXtensions for instrumentation bus (VXI bus) refers to standards for automated test based upon VMEbus.
VXI defines additional bus lines for timing and triggering as well as mechanical requirements and standard protocols for configuration, me ...
and
VPX
VPX (Virtual Path Cross-Connect), also known as VITA 46, refers to a set of standards for connecting components of a computer (known as a computer bus), commonly used by defense contractors.
Some are ANSI standards such as ANSI/VITA 46.0–2019.
...
.
The VMEbus had a strong influence on many later computer buses such as
STEbus.
VME early years
The architectural concepts of the VMEbus are based on VERSAbus,
developed in the late 1970s by Motorola. Motorola's European Microsystems group in Munich, West Germany, proposed the development of a VERSAbus-like product line based on the Eurocard mechanical standard. To demonstrate the concept, Max Loesel and Sven Rau developed three prototype boards: (1) a 68000 CPU board; (2) a dynamic memory board; (3) a static memory board. They named the new bus VERSAbus-E. This was later renamed "VME", short for Versa Module European, by Lyman (Lym) Hevle, then a VP with the Motorola Microsystems Operation. (He was later the founder of the VME Marketing Group, itself subsequently renamed to VME International Trade Association, or VITA). In early 1981, Motorola, Mostek and Signetics agreed to jointly develop and support the new bus architecture. These companies were all early supporters of the 68000 microprocessor family.
John Black of Motorola, Craig MacKenna of Mostek and Cecil Kaplinsky of Signetics developed the first draft of the VMEbus specification. In October 1981, at the System '81 trade show in Munich, West Germany, Motorola, Mostek, Signetics/Philips, and Thomson CSF announced their joint support of the VMEbus. They also placed Revision A of the specification in the public domain. In August 1982, Revision B of the VMEbus specification was published by the newly formed VMEbus Manufacturers' Group (VITA). This new revision refined the electrical specifications for the signal line drivers and receivers and brought the mechanical specification further in line with the developing IEC 297 standard (the formal specification for Eurocard mechanical formats). In latter 1982, the French delegation of the International Electrotechnical Commission (IEC) proposed Revision B of the VMEbus as an international standard. The IEC SC47B subcommittee nominated Mira Pauker of Philips, France, the chairperson of an editorial committee, thus formally starting international standardization of the VMEbus.
In March 1983, the IEEE Microprocessor Standards Committee (MSC) requested authorization to establish a working group that could standardize the VMEbus in the US. This request was approved by the IEEE Standards Board and the P1014 Working Group was established. Wayne Fischer was appointed first chairman of the working group. John Black served as chairman of the P1014 Technical Subcommittee. The IEC, IEEE and VMEbus Manufacturers Group (now VITA) distributed copies of Revision B for comment and received the resulting requests for changes to the document. These comments made it clear that it was time to go past Revision B. In December 1983, a meeting was held that included John Black, Mira Pauker, Wayne Fischer and Craig MacKenna. It was agreed that a Revision C should be created and that it should take into consideration all the comments received by the three organizations. John Black and Shlomo Pri-Tal of Motorola incorporated the changes from all sources into a common document. The VMEbus Manufacturers Group labelled the document Revision C.1 and placed it in the public domain. The IEEE labelled it P1014 Draft 1.2 and the IEC labelled it IEC 821 Bus. Subsequent ballots in the IEEE P1014 Working Group and the MSC resulted in more comments and required that the IEEE P1014 draft be updated. This resulted in the ANSI/IEEE 1014-1987 specification.
In 1985, Aitech developed under contract for US TACOM, the first conduction-cooled 6U VMEbus board. Although electrically providing a compliant VMEbus protocol interface, mechanically, this board was not interchangeable for use in air-cooled lab VMEbus development chassis.
In late 1987, a technical committee was formed under VITA under the direction of IEEE to create the first military, conduction-cooled 6U× 160mm, fully electrically and mechanically compatible, VMEbus board co-chaired by Dale Young (DY4 Systems) and Doug Patterson (Plessey Microsystems, then Radstone Technology). ANSI/IEEE-1101.2-1992 was later ratified and released in 1992 and remains in place as the conduction-cooled, international standard for all 6U VMEbus products.
In 1989, John Peters of Performance Technologies Inc. developed the initial concept of VME64: multiplexing address and data lines (A64/D64) on the VMEbus. The concept was demonstrated the same year and placed in the VITA Technical Committee in 1990 as a performance enhancement to the VMEbus specification. In 1991, the PAR (Project Authorization Request) for P1014R (revisions to the VMEbus specification) was granted by the IEEE. Ray Alderman, Technical Director of VITA, co-chaired the activity with Kim Clohessy of DY-4 Systems.
At the end of 1992, the additional enhancements to VMEbus (A40/D32, Locked Cycles, Rescinding DTACK*, Autoslot-ID, Auto System Controller, and enhanced DIN connector mechanicals) required more work to complete this document. The VITA Technical Committee suspended work with the IEEE and sought accreditation as a standards developer organization (SDO) with the American National Standards Institute (ANSI). The original IEEE Par P1014R was subsequently withdrawn by the IEEE. The VITA Technical Committee returned to using the public domain VMEbus C.1 specification as their base-level document, to which they added new enhancements. This enhancement work was undertaken entirely by the VITA Technical Committee and resulted in ANSI/VITA 1-1994. The tremendous undertaking of the document editing was accomplished by Kim Clohessy of DY-4 Systems, the technical co-chair of the activity, with great help from Frank Hom who created the mechanical drawings and exceptional contributions by each chapter editor.
Additional enhancements proposed to the VME64 Subcommittee were placed in the VME64 Extensions Document. Two other activities began in late 1992: BLLI (VMEbus Board-level Live Insertion Specifications) and VSLI (VMEbus System-level Live Insertion with Fault Tolerance).
In 1993, new activities began on the base-VME architecture, involving the implementation of high-speed
serial and
parallel
Parallel is a geometric term of location which may refer to:
Computing
* Parallel algorithm
* Parallel computing
* Parallel metaheuristic
* Parallel (software), a UNIX utility for running programs in parallel
* Parallel Sysplex, a cluster of ...
sub-buses for use as I/O interconnections and data mover subsystems. These architectures can be used as message switches, routers and small multiprocessor parallel architectures.
VITA's application for recognition as an accredited standards developer organization of ANSI was granted in June 1993. Numerous other documents ( including mezzanine, P2 and serial bus standards) have been placed with VITA as the Public Domain Administrator of these technologies.
Description
In many ways the VMEbus is equivalent or analogous to the pins of the
68000
The Motorola 68000 (sometimes shortened to Motorola 68k or m68k and usually pronounced "sixty-eight-thousand") is a 16/32-bit complex instruction set computer (CISC) microprocessor, introduced in 1979 by Motorola Semiconductor Products Secto ...
run out onto a
backplane
A backplane (or "backplane system") is a group of electrical connectors in parallel with each other, so that each pin of each connector is linked to the same relative pin of all the other connectors, forming a computer bus. It is used as a back ...
.
However, one of the key features of the 68000 is a flat
32-bit
In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32-bit units. Compared to smaller bit widths, 32-bit computers can perform large calculation ...
memory model, free of
memory segment
Memory segmentation is an operating system memory management technique of division of a computer's primary memory into segments or sections. In a computer system using segmentation, a reference to a memory location includes a value that identifie ...
ation and other "anti-features". The result is that, while VME is very 68000-like, the 68000 is generic enough to make this not an issue in most cases.
Like the 68000, VME uses separate 32-bit data and address buses. The 68000 address bus is actually 24-bit and the data bus 16-bit (although it is 32/32 internally) but the designers were already looking towards a full 32-bit implementation.
In order to allow both bus widths, VME uses two different Eurocard connectors, P1 and P2. P1 contains three rows of 32 pins each, implementing the first 24 address bits, 16 data bits and all of the control signals. P2 contains one more row, which includes the remaining 8 address bits and 16 data bits.
The bus is controlled by a set of nine lines, known as the ''arbitration bus''. All communications are controlled by the card in slot one of the Eurocard chassis, known as the ''arbiter module''. Two arbitration modes are supported - Round Robin and Prioritized.
Regardless of the arbitration mode, a card can attempt to become the bus master by holding one of the four Bus Request lines low. With round-robin arbitration, the arbiter cycles amongst Bus Request lines BR0–BR3 to determine which of the potentially simultaneous requesters will be granted the bus. With priority arbitration, BR0–BR3 use a fixed priority scheme (BR0 lowest, up to BR3 highest) and the arbiter will grant the bus to the highest priority requestor.
When the arbiter has determined which of the bus requests to grant, it asserts the corresponding Bus Grant line (BG0–BG3) for the level that won bus mastership. If two masters simultaneously request the bus using the same BR line, a bus grant daisy-chain effectively breaks the tie by granting the bus to the module closest to the arbiter. The master granted the bus will then indicate that the bus is in use by asserting Bus Busy (BBSY*).
At this point, the master has gained access to the bus. To write data, the card drives an address, an address modifier and data onto the bus. It then drives the ''address strobe'' line and the two ''data strobe'' lines low, to indicate the data is ready, and drives the write pin to indicate the transfer direction. There are two data strobes and an *LWORD line, so the cards can indicate if the data width is 8, 16, or 32 bits (or 64 in
VME64). The card at the bus address reads the data and pulls the ''data transfer acknowledge'' low line when the transfer can complete. If the transfer cannot complete, it can pull the ''bus error'' line low. Reading data is essentially the same but the controlling card drives the address bus, leaves the data bus tri-stated and drives the read pin. The slave card drives read data onto the data bus and drives the data strobe pins low when the data is ready. The signalling scheme is ''asynchronous'', meaning that the transfer is not tied to the timing of a bus clock pin (unlike synchronous buses such as
PCI).
A block transfer protocol allows several bus transfers to occur with a single address cycle. In block transfer mode, the first transfer includes an address cycle and subsequent transfers require only data cycles. The slave is responsible for ensuring that these transfers use successive addresses.
Bus masters can release the bus in two ways. With Release When Done (RWD), the master releases the bus when it completes a transfer and must re-arbitrate for the bus before every subsequent transfer. With Release On Request (ROR), the master retains the bus by continuing to assert BBSY* between transfers. ROR allows the master to retain control over the bus until a Bus Clear (BCLR*) is asserted by another master that wishes to arbitrate for the bus. Thus a master that generates bursts of traffic can optimize ''its'' performance by arbitrating for the bus on only the first transfer of each burst. This decrease in transfer latency comes at the cost of somewhat higher transfer latency for other masters.
Address modifiers are used to divide the VME bus address space into several distinct sub-spaces. The address modifier is a 6 bit wide set of signals on the backplane. Address modifiers specify the number of significant address bits, the privilege mode (to allow processors to distinguish between bus accesses by user-level or system-level software), and whether or not the transfer is a block transfer.
Below is an incomplete table of address modifiers:
VME also decodes all seven of the 68000's
interrupt
In digital computers, an interrupt (sometimes referred to as a trap) is a request for the processor to ''interrupt'' currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted, ...
levels onto a 7-pin interrupt bus. The interrupt scheme is one of prioritized vectored interrupts. The interrupt request lines (IRQ1–IRQ7) prioritize interrupts. An interrupting module asserts one of the interrupt request lines. Any module on the bus may potentially handle
any interrupt. When an interrupt handling module recognizes an interrupt request at a priority it handles, it arbitrates for the bus in the usual fashion described above. It then performs a read of the interrupt vector by driving the binary version of the IRQ line it handles (e.g. if IRQ5 is being handled, then binary 101) onto the address bus. It also asserts the IACK line, along with the appropriate data transfer strobes for the width of the status/ID being read. Again, LWORD*, DS0* and DS1* allow status/ID read cycles to be 8, 16, or 32 bit wide transfers but most existing hardware interrupters use 8 bit status/IDs. The interrupter responds by transferring a status/ID on the data bus to describe the interrupt. The interrupt handling module (usually a CPU) will usually use this status/ID number to identify and run the appropriate software interrupt service routine.
On the VME bus, all transfers are
DMA and every card is a master or slave. In most bus standards, there is a considerable amount of complexity added in order to support various transfer types and master/slave selection. For instance, with the
ISA bus, both of these features had to be added alongside the existing "channels" model, whereby all communications was handled by the host
CPU. This makes VME considerably simpler at a conceptual level while being more powerful, though it requires more complex controllers on each card.
Development tools
When developing and/or troubleshooting the VME bus, examination of hardware signals can be very important.
Logic analyzers
A logic analyzer is an electronic instrument that captures and displays multiple signals from a digital system or digital circuit. A logic analyzer may convert the captured data into timing diagrams, protocol decodes, state machine traces, ass ...
and
bus analyzer
A bus analyzer is a type of a protocol analysis tool, used for capturing and analyzing communication data across a specific interface bus, usually embedded in a hardware system. The bus analyzer functionality helps design, test and validation eng ...
s are tools that collect, analyze, decode, store signals so people can view the high-speed waveforms at their leisure.
VITA offers a comprehensive FAQ to assist with the front end design and development of VME systems.
Computers using a VMEbus
Computers using VMEbus include:
*
HP 743/744 PA-RISC
PA-RISC is an instruction set architecture (ISA) developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer (RISC) architecture, where the PA stands for Precision Architecture. The design is also referred to as ...
Single-board computer
*
Sun-2
The Sun-2 series of UNIX workstations and servers was launched by Sun Microsystems in November 1983. As the name suggests, the Sun-2 represented the second generation of Sun systems, superseding the original Sun-1 series. The Sun-2 series used a 10 ...
through
Sun-4 Sun-4 is a series of Unix workstations and servers produced by Sun Microsystems, launched in 1987. The original Sun-4 series were VMEbus-based systems similar to the earlier Sun-3 series, but employing microprocessors based on Sun's own SPARC V7 RIS ...
*
HP 9000
HP 9000 is a line of workstation and server computer systems produced by the Hewlett-Packard (HP) Company. The native operating system for almost all HP 9000 systems is HP-UX, which is based on UNIX System V.
The HP 9000 brand was introduced ...
Industrial Workstations
*
Atari TT030
The Atari TT030 is a member of the Atari ST family, released in 1990. It was originally intended to be a high-end Unix workstation, but Atari took two years to release a port of Unix SVR4 for the TT, which prevented the TT from ever being serio ...
and
Atari MEGA STE
*Motorola
MVME
Motorola Single Board Computers is Motorola's production line of computer boards for embedded system
An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices& ...
*
Symbolics
Symbolics was a computer manufacturer Symbolics, Inc., and a privately held company that acquired the assets of the former company and continues to sell and maintain the Open Genera Lisp system and the Macsyma computer algebra system.
*
Advanced Numerical Research and Analysis Group's PACE.
*
ETAS
The ETAS Group is a German company which designs tools for the development of embedded systems for the automotive industry and other sectors of the embedded industry. ETAS is 100-percent subsidiary of Robert Bosch GmbH.
Business
ETAS GmbH, f ...
ES1000 Rapid Prototyping System
*Several
Motorola 88000
The 88000 (m88k for short) is a RISC instruction set architecture developed by Motorola during the 1980s. The Motorola 88100, MC88100 arrived on the market in 1988, some two years after the competing SPARC and MIPS architecture, MIPS. Due to the ...
-based
Data General AViiON computers
*Early
Silicon Graphics MIPS-based systems including Professional IRIS, Personal IRIS, Power Series, and
Onyx
Onyx primarily refers to the parallel banded variety of chalcedony, a silicate mineral. Agate and onyx are both varieties of layered chalcedony that differ only in the form of the bands: agate has curved bands and onyx has parallel bands. The ...
systems
*
Convergent Technologies
Convergent Technologies was an American computer company formed by a small group of people who left Intel Corporation and Xerox PARC in 1979. Among the founders were CEO Allen Michels, VP Engineering Bob Garrow, head of marketing Kal Hubler, and ...
MightyFrame
Pinout
Seen looking into backplane socket.
[From Table 7 - 2 J2/P2 Pin Assignments, ANSI/VITA 1-1994 (R2002)]
P1
P2
P2 rows a and c can be used by a secondary bus, for example the
STEbus.
See also
*
Data acquisition Data acquisition is the process of sampling signals that measure real-world physical conditions and converting the resulting samples into digital numeric values that can be manipulated by a computer. Data acquisition systems, abbreviated by the acro ...
*
VPX
VPX (Virtual Path Cross-Connect), also known as VITA 46, refers to a set of standards for connecting components of a computer (known as a computer bus), commonly used by defense contractors.
Some are ANSI standards such as ANSI/VITA 46.0–2019.
...
*
VXS
VMEBus Switched Serial, commonly known as VXS, is an ANSI standard (ANSI/VITA 41) that improves the performance of standard parallel VMEbus by enhancing it to support newer switched serial fabrics. The base specification (ANSI 41) defines all comm ...
*
CompactPCI
CompactPCI is a computer bus interconnect for industrial computers, combining a Eurocard-type connector and PCI signaling and protocols. Boards are standardized to 3 U or 6U sizes, and are typically interconnected via a passive backplane. The ...
*
CAMAC
*
FPDP
*
List of device bandwidths
References
External links
VITANext Generation VMEVME bus pinout and signals
{{DEFAULTSORT:Vmebus
Computer buses
Experimental particle physics
IEEE standards
68k architecture