ThreadX is an embedded

real-time operating system A real-time operating system (RTOS) is an operating system (OS) for real-time computing applications that processes data and events that have critically defined time constraints. A RTOS is distinct from a time-sharing operating system, such as Unix ...

(RTOS) programmed mostly in the

C language C (''pronounced'' '' – like the letter c'') is a general-purpose programming language. It was created in the 1970s by Dennis Ritchie and remains very widely used and influential. By design, C's features cleanly reflect the capabilities o ...

. It was originally released in 1997 as ThreadX when Express Logic first developed it, later it was renamed to Azure RTOS (2019) after Express Logic was purchased by

Microsoft Microsoft Corporation is an American multinational corporation and technology company, technology conglomerate headquartered in Redmond, Washington. Founded in 1975, the company became influential in the History of personal computers#The ear ...

, then most recently it was renamed again to Eclipse ThreadX (2023), or "ThreadX" in its short form, after it transitioned to free

open source Open source is source code that is made freely available for possible modification and redistribution. Products include permission to use and view the source code, design documents, or content of the product. The open source model is a decentrali ...

model under the stewardship of the

Eclipse Foundation The Eclipse Foundation AISBL is an independent, Europe-based not-for-profit organization that acts as a steward of the Eclipse open source software development community, with legal jurisdiction in the European Union. It is an organization supp ...

History

In 1997, ThreadX was first released and marketed by Express Logic of

San Diego, California San Diego ( , ) is a city on the Pacific coast of Southern California, adjacent to the Mexico–United States border. With a population of over 1.4 million, it is the List of United States cities by population, eighth-most populous city in t ...

, United States. It was developed by William Lamie, who was also the original author of Nucleus and PX5 RTOS, and was President and CEO of Express Logic. ThreadX version 4 was introduced in 2001, version 5 was introduced in 2005, and then version 6 was introduced in 2020 (the latest major version). FileX – the embedded file system for ThreadX was introduced in 1999. NetX – the embedded TCP/IP networking stack for ThreadX was introduced in 2002. USBX – the embedded USB support for ThreadX was introduced in 2004. ThreadX SMP for SMP multi-core environments was introduced in 2009. ThreadX Modules was introduced in 2011. ThreadX achieved safety certifications for: TÜV

IEC 61508 IEC 61508 is an international standard published by the International Electrotechnical Commission (IEC) consisting of methods on how to apply, design, deploy and maintain automatic protection systems called safety-related systems. It is titled '' ...

in 2013, and UL 60730 in 2014. GUIX – the embedded UI for ThreadX was introduced in 2014. On April 18, 2019,

purchased Express Logic for an undisclosed sum and it was renamed to Azure RTOS. On November 21, 2023, Microsoft announced Azure RTOS would be transitioning to an

model under the stewardship of the

, and making the project available under the permissive

MIT License The MIT License is a permissive software license originating at the Massachusetts Institute of Technology (MIT) in the late 1980s. As a permissive license, it puts very few restrictions on reuse and therefore has high license compatibility. Unl ...

. With Eclipse Foundation as the new home, Azure RTOS was renamed to Eclipse ThreadX, or "ThreadX" in its short form.

Overview

The name ThreadX was derived from the threads that are used as the executable elements, and the letter ''X'' represents

context switching In computing, a context switch is the process of storing the state of a process or thread, so that it can be restored and resume execution at a later point, and then restoring a different, previously saved, state. This allows multiple processes ...

, i.e., it switches threads. ThreadX provides priority-based, preemptive scheduling, fast

interrupt In digital computers, an interrupt (sometimes referred to as a trap) is a request for the processor to ''interrupt'' currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted ...

response,

memory management Memory management (also dynamic memory management, dynamic storage allocation, or dynamic memory allocation) is a form of Resource management (computing), resource management applied to computer memory. The essential requirement of memory manag ...

, interthread communication,

mutual exclusion In computer science, mutual exclusion is a property of concurrency control, which is instituted for the purpose of preventing race conditions. It is the requirement that one thread of execution never enters a critical section while a concurr ...

, event notification, and thread

synchronization Synchronization is the coordination of events to operate a system in unison. For example, the Conductor (music), conductor of an orchestra keeps the orchestra synchronized or ''in time''. Systems that operate with all parts in synchrony are sa ...

features. Major distinguishing technology characteristics of ThreadX include preemption-threshold, priority inheritance, efficient timer management, fast software timers, picokernel design, event-chaining, and small size: minimal size on an

ARM architecture ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer, RISC instruction set architectures (ISAs) for central processing unit, com ...

processor is about 2 KB. ThreadX supports

multi-core processor A multi-core processor (MCP) is a microprocessor on a single integrated circuit (IC) with two or more separate central processing units (CPUs), called ''cores'' to emphasize their multiplicity (for example, ''dual-core'' or ''quad-core''). Ea ...

environments via either

asymmetric multiprocessing An asymmetric multiprocessing (AMP or ASMP) system is a multiprocessor computer system where not all of the multiple interconnected central processing units (CPUs) are treated equally. For example, a system might allow (either at the hardware or op ...

(AMP) or

symmetric multiprocessing Symmetric multiprocessing or shared-memory multiprocessing (SMP) involves a multiprocessor computer hardware and software architecture where two or more identical processors are connected to a single, shared main memory, have full access to all ...

(SMP). Application thread isolation with

memory management unit A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit that examines all references to computer memory, memory, and translates the memory addresses being referenced, known as virtual mem ...

(MMU) or memory protection unit (MPU) memory protection is available with ThreadX Modules. ThreadX has extensive safety certifications from Technischer Überwachungsverein (TÜV, English: Technical Inspection Association) and UL (formerly Underwriters Laboratories) and is Motor Industry Software Reliability Association

MISRA C MISRA C is a set of software development guidelines for the C (programming language), C programming language developed by Motor Industry Software Reliability Association, The MISRA Consortium. Its aims are to facilitate code safety, Computer secur ...

compliant. ThreadX is the foundation of Express Logic's X-Ware

Internet of things Internet of things (IoT) describes devices with sensors, processing ability, software and other technologies that connect and exchange data with other devices and systems over the Internet or other communication networks. The IoT encompasse ...

(IoT) platform, which also includes embedded file system support (FileX), embedded UI support (GUIX), embedded

Internet protocol suite The Internet protocol suite, commonly known as TCP/IP, is a framework for organizing the communication protocols used in the Internet and similar computer networks according to functional criteria. The foundational protocols in the suite are ...

(TCP/IP), and cloud connectivity (NetX/NetX Duo), and Universal Serial Bus (

USB Universal Serial Bus (USB) is an industry standard, developed by USB Implementers Forum (USB-IF), for digital data transmission and power delivery between many types of electronics. It specifies the architecture, in particular the physical ...

) support (USBX). ThreadX has won high appraisal from developers and is a very popular RTOS. , according to marketing research firm VDC Research, the ThreadX RTOS has become one of the most popular RTOSes in the world, having been deployed in over 6.2 billion devices, including consumer electronics, medical devices, data networking applications, and SoCs.

Technology

ThreadX implements a priority-based, preemptive scheduling algorithm with a proprietary feature called preemption-threshold. The latter has been shown to provide greater granularity within critical sections, reduce context switches, and has been the subject of academic research on guaranteeing scheduling. ThreadX provides a unique construct called event chaining, where the application can register a callback function on all

application programming interface An application programming interface (API) is a connection between computers or between computer programs. It is a type of software Interface (computing), interface, offering a service to other pieces of software. A document or standard that des ...

s (APIs) that can signal an external event. This helps applications chain together various public objects in ThreadX such that one thread can effectively block on multiple objects. ThreadX also provides counting semaphores, mutexes with optional priority inheritance, event flags,

message queue In computer science, message queues and mailboxes are software-engineering components typically used for inter-process communication (IPC), or for inter- thread communication within the same process. They use a queue for messaging – the ...

s, software timers, fixed-sized block memory, and variable-sized block memory. All APIs in ThreadX that block on resources also have an optional timeout. ThreadX offers

support via either AMP or SMP. Application code isolation is available through the ThreadX Modules component.

Safety certification

ThreadX (and FileX and NetX Duo) have been precertified by SGS-TÜV Saar to the following safety standards:

SIL 4, IEC 62304 Class C,

ISO 26262 ISO 26262, titled "Road vehicles – Functional safety", is an international standard for functional safety of electrical and/or electronic systems that are installed in serial production road vehicles (excluding mopeds), defined by the Intern ...

ASIL D, and EN 50128 SW-SIL 4. ThreadX (and FileX and NetX Duo) have been precertified by UL to the following safety standards: UL/ IEC 60730, UL/ IEC 60335, UL 1998 ThreadX has also been certified to DO-178 standards by various military and aerospace companies. It is supported by popular

Transport Layer Security Transport Layer Security (TLS) is a cryptographic protocol designed to provide communications security over a computer network, such as the Internet. The protocol is widely used in applications such as email, instant messaging, and voice over ...

(SSL/TLS)

libraries A library is a collection of Book, books, and possibly other Document, materials and Media (communication), media, that is accessible for use by its members and members of allied institutions. Libraries provide physical (hard copies) or electron ...

such as wolfSSL.

Packaging

As of 2017, ThreadX is packaged as part of X-Ware IoT Platform in full

source code In computing, source code, or simply code or source, is a plain text computer program written in a programming language. A programmer writes the human readable source code to control the behavior of a computer. Since a computer, at base, only ...

and with no runtime

royalty payment A royalty payment is a payment made by one party to another that owns a particular asset, for the right to ongoing use of that asset. Royalties are typically agreed upon as a percentage of gross or net revenues derived from the use of an asset or ...

Major components

The major ThreadX components are:

ThreadX

ThreadX is the

(RTOS).

FileX & LevelX

FileX is an optional file system for ThreadX. It supports

FAT12 File Allocation Table (FAT) is a file system developed for personal computers and was the default file system for the MS-DOS and Windows 9x operating systems. Originally developed in 1977 for use on floppy disks, it was adapted for use on ...

FAT16 File Allocation Table (FAT) is a file system developed for personal computers and was the default file system for the MS-DOS and Windows 9x operating systems. Originally developed in 1977 for use on floppy disks, it was adapted for use on Ha ...

FAT32 File Allocation Table (FAT) is a file system developed for personal computers and was the default file system for the MS-DOS and Windows 9x operating systems. Originally developed in 1977 for use on floppy disks, it was adapted for use on ...

, and exFAT file systems. The latter extends FAT file sizes beyond 4 GB, which is useful for large video files. It also offers fault tolerance and supports direct NOR and NAND

flash memory Flash memory is an Integrated circuit, electronic Non-volatile memory, non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory, NOR flash and NAND flash, are named for t ...

media through an optional flash wear leveling product called LevelX.

GUIX

GUIX is an optional

graphical user interface A graphical user interface, or GUI, is a form of user interface that allows user (computing), users to human–computer interaction, interact with electronic devices through Graphics, graphical icon (computing), icons and visual indicators such ...

(GUI) for ThreadX. It provides a

2D computer graphics 2D computer graphics is the computer-based generation of digital images—mostly from two-dimensional models (such as 2D geometric models, text, and digital images) and by techniques specific to them. It may refer to the branch of computer s ...

system that supports multiple

display device A display device is an output device for presentation of information in visual or tactile form (the latter used for example in tactile electronic displays for blind people). When the input information that is supplied has an electrical signa ...

s with a variety of screen resolutions and color depths. Many predefined

graphical widget A graphical widget (also graphical control element or control) in a graphical user interface is an element of interaction, such as a button or a scroll bar. Controls are software components that a computer user interacts with through direct m ...

s are available. A Windows

WYSIWYG In computing, WYSIWYG ( ), an acronym for what you see is what you get, refers to software that allows content to be edited in a form that resembles its appearance when printed or displayed as a finished product, such as a printed document, web ...

host tool called GUIX Studio automatically generates C code for GUIX to execute at runtime.

NetX Duo

NetX Duo is an optional

TCP/IP The Internet protocol suite, commonly known as TCP/IP, is a framework for organizing the communication protocols used in the Internet and similar computer networks according to functional criteria. The foundational protocols in the suite are ...

network system for ThreadX. It supports both

IPv4 Internet Protocol version 4 (IPv4) is the first version of the Internet Protocol (IP) as a standalone specification. It is one of the core protocols of standards-based internetworking methods in the Internet and other packet-switched networks. ...

and

IPv6 Internet Protocol version 6 (IPv6) is the most recent version of the Internet Protocol (IP), the communication protocol, communications protocol that provides an identification and location system for computers on networks and routes traffic ...

networking with IPsec network security. TCP and UDP socket layers are provided by TLS / DTLS. Optional protocols include ARP, Auto IP, DHCP, DNS, DNS-SD, FTP, HTTP, ICMP, IGMP, mDNS, POP3, PPP, PPPoE, RARP, TFTP, SNTP, SMTP, SNMP, and

Telnet Telnet (sometimes stylized TELNET) is a client-server application protocol that provides access to virtual terminals of remote systems on local area networks or the Internet. It is a protocol for bidirectional 8-bit communications. Its main ...

. IoT Cloud protocol support includes CoAP, MQTT, and LWM2M. NetX Duo also supports Thread and 6LoWPAN. In 2017, ThreadX and NetX Duo became a Thread Certified Product.

USBX

USBX is an optional Universal Serial Bus (

) system for ThreadX. It supports both host/device/on-the-go (OTG). Host controller support includes EHCI, OHCI, and proprietary USB host controllers. It supports these USB Device Classes: Audio, Asix, CDC/ACM, CDC/ECM, DFU, GSER, HID, PIMA, Printer, Prolific, RNDIS, and Storage.

TraceX

TraceX is an optional host software that provides a graphical view of ThreadX RTOS events. It requires

Windows XP Windows XP is a major release of Microsoft's Windows NT operating system. It was released to manufacturing on August 24, 2001, and later to retail on October 25, 2001. It is a direct successor to Windows 2000 for high-end and business users a ...

or later.

Supported ports

* ARM classic cores (32bit) ** ARM7 **

ARM9 ARM9 is a group of 32-bit RISC ARM processor cores licensed by ARM Holdings for microcontroller use. The ARM9 core family consists of ARM9TDMI, ARM940T, ARM9E-S, ARM966E-S, ARM920T, ARM922T, ARM946E-S, ARM9EJ-S, ARM926EJ-S, ARM968E-S, ARM99 ...

** ARM11 * ARM microcontroller cores (32bit) **

ARM Cortex-M0 The ARM Cortex-M is a group of 32-bit RISC ARM processor cores licensed by ARM Limited. These cores are optimized for low-cost and energy-efficient integrated circuits, which have been embedded in tens of billions of consumer devices. Thoug ...

** ARM Cortex-M0+ **

ARM Cortex-M3 The ARM Cortex-M is a group of 32-bit reduced instruction set computer, RISC ARM architecture, ARM processor cores licensed by Arm (company), ARM Limited. These cores are optimized for low-cost and energy-efficient integrated circuits, which h ...

ARM Cortex-M4 The ARM Cortex-M is a group of 32-bit RISC ARM processor cores licensed by ARM Limited. These cores are optimized for low-cost and energy-efficient integrated circuits, which have been embedded in tens of billions of consumer devices. Thoug ...

** ARM Cortex-M7 ** ARM Cortex-M23 ** ARM Cortex-M33 ** ARM Cortex-M55 ** ARM Cortex-M85 * ARM real time cores (32bit) ** ARM Cortex-R4 ** ARM Cortex-R5 ** ARM Cortex-R7 * ARM application cores (32bit) ** ARM Cortex-A5 ** ARM Cortex-A7 **

ARM Cortex-A8 The ARM Cortex-A8 is a 32-bit processor core licensed by ARM Holdings implementing the ARM architecture, ARMv7-A architecture. Compared to the ARM11, the Cortex-A8 is a dual-issue superscalar processor, superscalar design, achieving roughly twic ...

ARM Cortex-A9 The ARM Cortex-A9 MPCore is a 32-bit multi-core processor that provides up to 4 cache-coherent cores, each implementing the ARM v7 architecture instruction set. It was introduced in 2007. Features Key features of the Cortex-A9 core are: * ou ...

** ARM Cortex-A12 ** ARM Cortex-A15 ** ARM Cortex-A17 ** ARM Cortex-A35 * ARM application cores (32bit) **

ARM Cortex-A53 The ARM Cortex-A53 is one of the first two central processing units implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Cambridge design centre, along with the Cortex-A57. The Cortex-A53 is a 2-wide decode superscalar p ...

ARM Cortex-A55 The ARM Cortex-A55 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings' Cambridge design centre. The Cortex-A55 is a 2-wide decode in-order superscalar pipeline. Design The Cortex-A55 serves ...

ARM Cortex-A57 The ARM Cortex-A57 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings. The Cortex-A57 is an out-of-order superscalar pipeline. It is available as SIP core to licensees, and its design makes i ...

ARM Cortex-A72 The ARM Cortex-A72 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Austin design centre. The Cortex-A72 is a 3-way decode out-of-order superscalar pipeline. It is available as SIP core t ...

ARM Cortex-A73 The ARM Cortex-A73 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Sophia design centre. The Cortex-A73 is a 2-wide decode out-of-order superscalar pipeline. The Cortex-A73 serves as the su ...

** ARM Cortex-A75 ** ARM Cortex-A76 ** ARM Cortex-A77 * ARM application cores (64bit) ** ARM Cortex-A34 **

ARM Cortex-A65 In human anatomy, the arm refers to the upper limb in common usage, although academically the term specifically means the upper arm between the glenohumeral joint (shoulder joint) and the elbow joint. The distal part of the upper limb between th ...

** ARM Cortex-A76 * Other cores ** ARC EM / HS **

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California, and Delaware General Corporation Law, incorporated in Delaware. Intel designs, manufactures, and sells computer compo ...

x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel, based on the 8086 microprocessor and its 8-bit-external-bus variant, the 8088. Th ...

(32bit) ** Renesas RXv1 / RXv2 / RXv3 **

RISC-V RISC-V (pronounced "risk-five") is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. The project commenced in 2010 at the University of California, Berkeley. It transfer ...

(32bit) ** Tensilica Xtensa ** TI TMS320C667x (DSP) * Operating systems **

Linux Linux ( ) is a family of open source Unix-like operating systems based on the Linux kernel, an kernel (operating system), operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically package manager, pac ...

Windows Windows is a Product lining, product line of Proprietary software, proprietary graphical user interface, graphical operating systems developed and marketed by Microsoft. It is grouped into families and subfamilies that cater to particular sec ...

(32bit)

Products using ThreadX

Some examples of products that use ThreadX: * Small wearable devices. *

Hewlett-Packard The Hewlett-Packard Company, commonly shortened to Hewlett-Packard ( ) or HP, was an American multinational information technology company. It was founded by Bill Hewlett and David Packard in 1939 in a one-car garage in Palo Alto, California ...

inkjet printers and all-in-one devices. *

Management Engine (ME). *

NASA The National Aeronautics and Space Administration (NASA ) is an independent agencies of the United States government, independent agency of the federal government of the United States, US federal government responsible for the United States ...

Deep Impact space probe. *

Raspberry Pi Raspberry Pi ( ) is a series of small single-board computers (SBCs) developed in the United Kingdom by the Raspberry Pi Foundation in collaboration with Broadcom Inc., Broadcom. To commercialize the product and support its growing demand, the ...

line of

single-board computer A single-board computer (SBC) is a complete computer built on a single circuit board, with microprocessor(s), memory, input/output (I/O) and other features required of a functional computer. Single-board computers are commonly made as demonst ...

s runs ThreadX as a binary blob on the

graphics processing unit A graphics processing unit (GPU) is a specialized electronic circuit designed for digital image processing and to accelerate computer graphics, being present either as a discrete video card or embedded on motherboards, mobile phones, personal ...

(GPU). This controls initial

booting In computing, booting is the process of starting a computer as initiated via Computer hardware, hardware such as a physical button on the computer or by a software command. After it is switched on, a computer's central processing unit (CPU) h ...

, which in turn is used to boot secondary operating systems such as

, and continues to operate in a more privileged role even after the boot process.