TILE-Gx is a
VLIW
Very long instruction word (VLIW) refers to instruction set architectures designed to exploit instruction level parallelism (ILP). Whereas conventional central processing units (CPU, processor) mostly allow programs to specify instructions to exe ...
ISA multicore processor
A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such a ...
family by
Tilera
Tilera Corporation was a fabless semiconductor company focusing on manycore embedded processor design. The company shipped multiple processors, including the TILE64, TILE''Pro''64, and the TILE''Pro''36, TILE-Gx72, TILE-Gx36, TILE-Gx16 and TILE- ...
. It consists of a
mesh network
A mesh network is a local area network topology in which the infrastructure nodes (i.e. bridges, switches, and other infrastructure devices) connect directly, dynamically and non-hierarchically to as many other nodes as possible and cooperate wit ...
of up to 100 cores.
It is to be produced by
TSMC
Taiwan Semiconductor Manufacturing Company Limited (TSMC; also called Taiwan Semiconductor) is a Taiwanese multinational corporation, multinational semiconductor contract manufacturing and design company. It is the world's most valuable semicon ...
with 40 nm. It was announced on February 19, 2013 that Tilera would produce a 72-core Tile-Gx CPU capable of processing high-bandwidth networks.
*64-bit core (3-issue)
*32 KB L1 I-cache, 32 KB L1 D-cache (per core
)
*256 KB L2 cache (per core
)
*up to 26 MB L3 cache (per chip)
* 4 MAC/cycle with SIMD extensions
* 2 or 4 ECC 72-bit DDR3 memory controllers (up to 2.1 GHz)
* Built-in crypto accelerator with 40 Gbit/s encryption (small packet) and 20 Gbit/s full-duplex compression, true random number generator,
RSA accelerator
As of June 2018, the Linux kernel has dropped support for this architecture.
See also
*
TILE64
TILE64 is a VLIW ISA multicore processor manufactured by Tilera. It consists of a mesh network of 64 "tiles", where each tile houses a general purpose processor, cache, and a non-blocking router, which the tile uses to communicate with the o ...
*
TILE''Pro''64
References
*
{{reflist, 30em
Manycore processors
Very long instruction word computing