The subthreshold slope is a feature of a
MOSFET
The metal–oxide–semiconductor field-effect transistor (MOSFET, MOS-FET, or MOS FET) is a type of field-effect transistor (FET), most commonly fabricated by the controlled oxidation of silicon. It has an insulated gate, the voltage of which d ...
's
current–voltage characteristic.
In the
subthreshold region, the
drain current behaviour – though being controlled by the
gate
A gate or gateway is a point of entry to or from a space enclosed by walls. The word derived from old Norse "gat" meaning road or path; But other terms include ''yett and port''. The concept originally referred to the gap or hole in the wall ...
terminal – is similar to the exponentially decreasing current of a
forward biased diode. Therefore a plot of drain current versus gate voltage with drain,
source, and
bulk voltages fixed will exhibit approximately log linear behaviour in this MOSFET operating regime. Its slope is the subthreshold slope.
The subthreshold slope is also the
reciprocal value
In mathematics, a multiplicative inverse or reciprocal for a number ''x'', denoted by 1/''x'' or ''x''−1, is a number which when multiplied by ''x'' yields the multiplicative identity, 1. The multiplicative inverse of a fraction ''a''/'' ...
of the subthreshold swing ''S
s-th'' which is usually given as:
[''Physics of Semiconductor Devices'', S. M. Sze. New York: Wiley, 3rd ed., with Kwok K. Ng, 2007, chapter 6.2.4, p. 315, .]
=
depletion layer capacitance
= gate-oxide capacitance
=
thermal voltage
The minimum subthreshold swing of a conventional device can be found by letting
and/or
, which yield
(known as thermionic limit) and 60 mV/dec at room temperature (300 K). A typical experimental subthreshold swing for a scaled MOSFET at room temperature is ~70 mV/dec, slightly degraded due to short-channel MOSFET parasitics.
A ''dec'' (decade) corresponds to a 10 times increase of the drain current ''I
D''.
A device characterized by steep subthreshold slope exhibits a faster transition between off (low current) and on (high current) states.
References
External links
Optimization of Ultra-Low-Power CMOS Transistors Michael Stockinger, 2000
{{DEFAULTSORT:Subthreshold Slope
Transistor modeling