Standard Delay Format (SDF) is an
IEEE
The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operat ...
standard for the representation and interpretation of timing data for use at any stage of an electronic design process. It finds wide applicability in design flows, and forms an efficient bridge between
dynamic timing verification Dynamic timing verification refers to verifying that an ASIC design is fast enough to run without errors at the targeted clock rate. This is accomplished by simulating the design files used to synthesize the integrated circuit
An integrated ...
and
static timing analysis.
It was originally developed as an
OVI standard, and later modified into the
IEEE
The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operat ...
format. Technically only the SDF version 4.0 onwards are
IEEE
The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operat ...
formats.
It is an
ASCII
ASCII ( ), abbreviated from American Standard Code for Information Interchange, is a character encoding standard for electronic communication. ASCII codes represent text in computers, telecommunications equipment, and other devices. Because ...
format that is represented in a tool and language independent way and includes path delays,
timing constraint values,
interconnect delays and high level technology parameters.
It has usually two sections: one for interconnect delays and the other for cell delays.
SDF format can be used for back-annotation as well as forward-annotation.
See also:
VITAL,
EDIF EDIF (Electronic Design Interchange Format) is a vendor-neutral format based on S-Expressions in which to store Electronic netlists and schematics. It was one of the first attempts to establish a neutral data exchange format for the electronic desi ...
References
*
**IEC 61523-3:2004
External links
*https://web.archive.org/web/20130524215112/http://www.eda.org/sdf/
Standard Delay Format Specification in PDF format, version 3.0 (1995)
EDA file formats
IEEE DASC standards
IEC standards
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