Specman is an

EDA EDA or Eda may refer to: Computing * Electronic design automation * Enterprise Desktop Alliance, a computer technology consortium * Enterprise digital assistant * Estimation of distribution algorithm * Event-driven architecture * Exploratory ...

tool that provides advanced automated functional verification of hardware designs. It provides an environment for working with, compiling, and debugging testbench environments written in the ''e''

Hardware Verification Language A hardware verification language, or HVL, is a programming language used to verify the designs of electronic circuits written in a hardware description language. HVLs typically include features of a high-level programming language like C++ or Java ...

. Specman also offers automated testbench generation to boost productivity in the context of block, chip, and system verification. The Specman tool itself does not include an HDL-simulator (for design languages such as

VHDL The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gate ...

Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is als ...

.) To simulate an e-testbench with a design written in VHDL/Verilog, Specman must be run in conjunction with a separate HDL simulation tool. Specman is a feature of Cadence new Xcelium simulator, where tighter product integration offers both faster runtime performance and debug capabilities not available with other HDL-simulators. In principle, Specman can co-simulate with any HDL-simulator supporting standard PLI or VHPI interface, such as Synopsys's VCS, or Mentor's Questa.

History

Specman was originally developed at Verisity, an Israel-based company, which was acquired by

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on April 7, 2005. It is now part of the Cadence's functional verification suite.

References

Hardware verification languages {{compu-eng-stub