Software verification is a discipline of
software engineering
Software engineering is a systematic engineering approach to software development.
A software engineer is a person who applies the principles of software engineering to design, develop, maintain, test, and evaluate computer software. The term '' ...
whose goal is to assure that software fully satisfies all the expected requirements.
Broad scope and classification
A broad definition of verification makes it equivalent to
software testing
Software testing is the act of examining the artifacts and the behavior of the software under test by validation and verification. Software testing can also provide an objective, independent view of the software to allow the business to apprecia ...
. In that case, there are two fundamental approaches to verification:
* ''Dynamic verification'', also known as
experimentation
An experiment is a procedure carried out to support or refute a hypothesis, or determine the efficacy or likelihood of something previously untried. Experiments provide insight into cause-and-effect by demonstrating what outcome occurs when ...
,
dynamic testing or, simply testing. - This is good for finding faults (
software bugs
A software bug is an error, flaw or fault (technology), fault in the design, development, or operation of computer software that causes it to produce an incorrect or unexpected result, or to behave in unintended ways. The process of finding an ...
).
* ''Static verification'', also known as
analysis
Analysis ( : analyses) is the process of breaking a complex topic or substance into smaller parts in order to gain a better understanding of it. The technique has been applied in the study of mathematics and logic since before Aristotle (38 ...
or,
static testing
In computer science, static program analysis (or static analysis) is the analysis of computer programs performed without executing them, in contrast with dynamic program analysis, which is performed on programs during their execution.
The term i ...
- This is useful for proving the
correctness of a program. Although it may result in false positives when there are one or more conflicts between the process a software really does and what the static verification assumes it does.
Dynamic verification (Test, experimentation)
Dynamic verification is performed during the execution of software, and dynamically checks its behavior; it is commonly known as the
Test
Test(s), testing, or TEST may refer to:
* Test (assessment), an educational assessment intended to measure the respondents' knowledge or other abilities
Arts and entertainment
* ''Test'' (2013 film), an American film
* ''Test'' (2014 film), ...
phase.
Verification is a Review Process.
Depending on the scope of tests, we can categorize them in three families:
* ''Test in the small'': a test that checks a single function or class (
Unit test
In computer programming, unit testing is a software testing method by which individual units of source code—sets of one or more computer program modules together with associated control data, usage procedures, and operating procedures&mda ...
)
* ''Test in the large'': a test that checks a group of classes, such as
** Module test (a single module)
**
Integration test
Integration testing (sometimes called integration and testing, abbreviated I&T) is the phase in software testing in which individual software modules are combined and tested as a group. Integration testing is conducted to evaluate the complianc ...
(more than one module)
** System test (the entire system)
* ''Acceptance test'': a formal test defined to check acceptance criteria for a software
** Functional test
** Non functional test (performance,
stress test)
The aim of software dynamic verification is to find the errors introduced by an activity (for example, having a medical software to analyze bio-chemical data); or by the repetitive performance of one or more activities (such as a stress test for a web server, i.e. check if the current product of the activity is as correct as it was at the beginning of the activity).
Static verification (Analysis)
Static verification is the process of checking that software meets requirements by inspecting the code before it runs. For example:
* ''
Code conventions
Coding conventions are a set of guidelines for a specific programming language that recommend programming style, practices, and methods for each aspect of a program written in that language. These conventions usually cover file organization, ind ...
verification''
* ''Bad practices (
anti-pattern
An anti-pattern in software engineering, project management, and business processes is a common response to a recurring problem that is usually ineffective and risks being highly counterproductive. The term, coined in 1995 by computer programmer An ...
) detection''
*
Software metric
In software engineering and development, a software metric is a standard of measure of a degree to which a software system or process possesses some property. Even if a metric is not a measurement (metrics are functions, while measurements are t ...
s calculation
*
Formal verification
In the context of hardware and software systems, formal verification is the act of proving or disproving the correctness of intended algorithms underlying a system with respect to a certain formal specification or property, using formal metho ...
Verification by Analysis - The analysis verification method applies to verification by investigation, mathematical calculations, logical evaluation, and calculations using classical textbook methods or accepted general use computer methods. Analysis includes sampling and correlating measured data and observed test results with calculated expected values to establish conformance with requirements.
Narrow scope
When it is defined more strictly, verification is equivalent only to static testing and it is intended to be applied to artifacts. And, validation (of the whole software product) would be equivalent to dynamic testing and intended to be applied to the running software product (not its artifacts, except requirements). Notice that requirements validation can be performed statically and dynamically (See
artifact validation).
Comparison with validation
Software verification is often confused with software validation. The difference between
''verification'' and ''validation'':
* Software ''verification'' asks the question, "Are we building the product right?"; that is, does the software conform to its specifications? (As a house conforms to its blueprints.)
* Software ''validation'' asks the question, "Are we building the right product?"; that is, does the software do what the user really requires? (As a house conforms to what the owner needs and wants.)
See also
*
Verification and validation (software)
Verify or verification may refer to:
General
* Verification and validation, in engineering or quality management systems, is the act of reviewing, inspecting or testing, in order to establish and document that a product, service or system meets ...
*
Runtime verification Runtime verification is a computing system analysis and execution approach based on extracting information from a running system and using it to detect and possibly react to observed behaviors satisfying or violating certain properties. Some very p ...
*
Hardware verification
References
*
IEEE
The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operation ...
: ''SWEBOK: Guide to the Software Engineering Body of Knowledge''
*
Carlo Ghezzi,
Mehdi Jazayeri,
Dino Mandrioli: ''Fundamentals of Software Engineering'', Prentice Hall, {{ISBN, 0-13-099183-X
*
Alan L. Breitler: ''A Verification Procedure for Software Derived from Artificial Neural Networks'', Journal of the International Test and Evaluation Association, Jan 2004, Vol 25, No 4.
* Vijay D'Silva,
Daniel Kroening
Daniel Kroening (born 6 November 1975) is a German computer scientist, Professor in computer science at the University of Oxford, and Chief Science Officer at the company he co-founded, Diffblue Ltd. He is a fellow of Magdalen College.
Early lif ...
, Georg Weissenbacher
A Survey of Automated Techniques for Formal Software Verification IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1165-1178 (2008)
Software testing