Serial Vector Format (SVF) is a file format that contains

boundary scan Boundary scan is a method for testing interconnects (wire lines) on printed circuit boards or sub-blocks inside an integrated circuit. Boundary scan is also widely used as a debugging method to watch integrated circuit pin states, measure voltage ...

vectors to be sent to an

electronic circuit An electronic circuit is composed of individual electronic components, such as resistors, transistors, capacitors, inductors and diodes, connected by conductive wires or traces through which electric current can flow. It is a type of electrical ...

using a

JTAG JTAG (named after the Joint Test Action Group which codified it) is an Technical standard, industry standard for verifying designs and testing printed circuit boards after manufacture. JTAG implements standards for on-chip instrumentation in ele ...

interface. Boundary scan vectors consist of the following data: * Stimulus data: This is data to be sent to a device or

* Expected response: This is the data the device or circuit is expected to send back if there is no error *

Mask A mask is an object normally worn on the face, typically for protection, disguise, performance, or entertainment and often they have been employed for rituals and rights. Masks have been used since antiquity for both ceremonial and practic ...

data: Defines which

bit The bit is the most basic unit of information in computing and digital communications. The name is a portmanteau of binary digit. The bit represents a logical state with one of two possible values. These values are most commonly represente ...

s in the expected response are valid; other bits of the device's response are unknown and must be ignored when comparing the expected response and the data returned from the circuit * Additional information on how to send the data (e.g. maximum

clock A clock or a timepiece is a device used to measure and indicate time. The clock is one of the oldest human inventions, meeting the need to measure intervals of time shorter than the natural units such as the day, the lunar month and the ...

frequency) The SVF standard was jointly developed by companies ''

Texas Instruments Texas Instruments Incorporated (TI) is an American technology company headquartered in Dallas, Texas, that designs and manufactures semiconductors and various integrated circuits, which it sells to electronics designers and manufacturers globall ...

'' and ''

Teradyne Teradyne, Inc. is an American automatic test equipment (ATE) designer and manufacturer based in North Reading, Massachusetts. Teradyne's high-profile customers include Samsung, Qualcomm, Intel, Analog Devices, Texas Instruments and IBM. His ...

''. Control over the format has been handed off to boundary-scan solution provider ''ASSET InterTech''. The most recent revision is Revision E. SVF files are used to transfer boundary scan data between tools. As an example a

VHDL The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gates ...

compiler may create an SVF file that is read by a tool for programming CPLDs. The SVF file is defined as an ASCII file that consists of a set of SVF statements. The maximum number of characters allowed on a line is 256, although one SVF statement can span more than one line. Each statement consists of a command and associated parameters. Each SVF statement is terminated by a semicolon. SVF is not case sensitive. Comments can be inserted into a SVF file after an exclamation point ‘!’ or a pair of slashes ‘//’. Either ‘//’ or ‘!’ will comment out the remainder of the line.

SVF commands

* ENDDR: Specifies default end state for DR scan operations. * ENDIR: Specifies default end state for IR scan operations. * FREQUENCY: Specifies maximum test clock frequency for IEEE 1149.1 bus operations. * HDR: (Header Data Register) Specifies a header pattern that is prepended to the beginning of subsequent DR scan operations. * HIR: (Header Instruction Register) Specifies a header pattern that is prepended to the beginning of subsequent IR scan operations. * PIO: (Parallel Input/Output) Specifies a parallel test pattern. * PIOMAP: (Parallel Input/Output Map) Maps PIO column positions to a logical pin. * RUNTEST: Forces the IEEE 1149.1 bus to a run state for a specified number of clocks or a specified time period. * SDR: (Scan Data Register) Performs an IEEE 1149.1 Data Register scan. * SIR: (Scan Instruction Register) Performs an IEEE 1149.1 Instruction Register scan. * STATE: Forces the IEEE 1149.1 bus to a specified stable state. * TDR: (Trailer Data Register) Specifies a trailer pattern that is appended to the end of subsequent DR scan operations. * TIR: (Trailer Instruction Register) Specifies a trailer pattern that is appended to the end of subsequent IR scan operations. * TRST: (Test ReSeT) Controls the optional Test Reset line.

References

* The In-System Configuration Handbook: A Designer's Guide to ISC, Neil G. Jacobson, {{ISBN, 1-4020-7655-X

External links

Serial Vector Format Specification
latest version available - Revision E
SVF and XSVF File Formats for Xilinx Devices
specifies XSVF, a binary version of SVF Electronics manufacturing