SPI-4.2 is a version of the
System Packet Interface published by the
Optical Internetworking Forum. It was designed to be used in systems that support
OC-192 SONET interfaces and is sometimes used in
10 Gigabit Ethernet
10 Gigabit Ethernet (10GE, 10GbE, or 10 GigE) is a group of computer networking technologies for transmitting Ethernet frames at a rate of 10 gigabits per second. It was first defined by the IEEE 802.3ae-2002 standard. Unlike previous Eth ...
based systems.
SPI-4 is an interface for packet and cell transfer between a
physical layer
In the seven-layer OSI model of computer networking, the physical layer or layer 1 is the first and lowest layer; The layer most closely associated with the physical connection between devices. This layer may be implemented by a PHY chip.
The ...
(PHY) device and a
link layer device, for aggregate bandwidths of
OC-192 Asynchronous Transfer Mode and
Packet over SONET/SDH (POS), as well as 10 Gigabit Ethernet applications.
SPI-4 has two types of transfers—Data when the RCTL signal is deasserted; Control when the RCTL signal is asserted. The transmit and receive data paths include, respectively, (TDCLK, TDAT
5:0TCTL) and (RDCLK, RDAT
5:0 RCTL). The transmit and receive FIFO status channels include (TSCLK, TSTAT
:0 and (RSCLK, RSTAT
:0 respectively.
A typical application of SPI-4.2 is to connect a framer device to a
network processor
A network processor is an integrated circuit which has a feature set specifically targeted at the networking application domain.
Network processors are typically software programmable devices and would have generic characteristics similar to gene ...
. It has been widely adopted by the high speed networking marketplace.
The interface consists of (per direction):
* sixteen
LVDS pairs for the data path
* one LVDS pair for control
* one LVDS pair for clock at half of the data rate
* two
FIFO status lines running at 1/8 of the data rate
* one status clock
The clocking is
source-synchronous Source-Synchronous clocking refers to a technique used for timing symbols on a digital interface. Specifically, it refers to the technique of having the transmitting device send a clock signal along with the data signals. The timing of the unidirec ...
and operates around 700 MHz. Implementations of SPI-4.2 have been produced which allow somewhat higher clock rates. This is important when overhead bytes are added to incoming packets.
PMC-Sierra made the original OIF contribution for SPI-4.2. That contribution was based on the
PL-4 specification that was developed by PMC-Sierra in conjunction with the
SATURN Development Group.
The physical layer of SPI-4.2 is very similar to the
HyperTransport
HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low- latency point-to-point link that was introduced on April 2 ...
1.x interface, although the logical layers are very different.
External links
OIF Interoperability Agreements
Network protocols
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