Reduced Latency DRAM (RLDRAM) is a type of specialty

dynamic random-access memory Dynamic random-access memory (dynamic RAM or DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell, usually consisting of a tiny capacitor and a transistor, both typically based on metal-oxide ...

(DRAM) with a SRAM-like interface originally developed by

Infineon Technologies Infineon Technologies AG is a German semiconductor manufacturer founded in 1999, when the semiconductor operations of the former parent company Siemens AG were spun off. Infineon has about 50,280 employees and is one of the ten largest semicond ...

. It is a high-bandwidth, semi-commodity, moderately low-latency (relative to contemporaneous SRAMs) memory targeted at embedded applications (such as computer networking equipment) requiring memories that have moderate costs and low latency (relative to commodity DRAM); and capacities greater than those offered by SRAMs.Jacob, Bruce et al. (2008). ''Memory Systems: Cache, DRAM, Disk''. Morgan Kaufmann Publishers. pp. 494. RLDRAM also has better performance compared to contemporaneous commodity DRAMs when there are back-to-back read and write accesses, or completely random accesses. The first generation RLDRAM devices appeared in 1999, and were initially only fabricated by Infineon. Later,

Micron Technology Micron Technology, Inc. is an American producer of computer memory and computer data storage including dynamic random-access memory, flash memory, and USB flash drives. It is headquartered in Boise, Idaho. Its consumer products, including ...

was brought in as a development partner and second source for RLDRAM devices. The second-generation RLDRAM II specification was announced by Infineon and Micron in 2003. Infineon subsequently decided to abandon RLDRAM development, and RLDRAM II devices were introduced by Micron. The first RLDRAM II samples appeared in the same year. In 2012, Micron demonstrated the first third-generation RLDRAM 3 devices. Xilinx and Micron demo interoperability of FPGA and RLDRAM 3 memory interface standard
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References

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