A processor supplementary capability is a feature that has been added to an existing

central processing unit A central processing unit (CPU), also called a central processor, main processor or just Processor (computing), processor, is the electronic circuitry that executes Instruction (computing), instructions comprising a computer program. The CPU per ...

(CPU) design after the initial introduction of that design to the marketplace. A supplementary capability increases the usefulness of the processor design, allowing it to compete more favorably with competitors and giving consumers a reason to upgrade, while retaining backwards compatibility with the original design. The CPU supplementary instruction capability does not as a rule apply to 8 or 16 bit CPUs, as many of these CPUs are used mostly as microcontrollers. On modern 32 and 64 bit CPUs the ''processor supplementary capability'' does not extend to Floating Point Units (FPUs) or

Memory Management Unit A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit having all memory references passed through itself, primarily performing the translation of virtual memory addresses to physical a ...

s (MMUs) as these are considered to be fundamental core functionalities. Extensions to the core functionalities of the MMU and FPU may be considered CPU extensions however.

Historical reasoning

The supplementary instructions feature has always been assumed to mean fixed sets of instructions that are not obligatory across all CPUs in a CPU family. Supplementary instructions will simply not be found on all processors within that family. A programmer who wishes to use a supplementary feature of a CPU is faced with a couple of choices. Supplemental instruction programming options * The ''operating system'' (kernel) and ''systems programmer'' (programs) may choose to design the systems software so that it mandatorily uses that feature and therefore can only be run on the more recent processors that have that feature. * On the other hand the system programmer may write or use existing software libraries to determine whether the processor it is running on has a particular feature (or set of instructions). Should the needed instructions not be there a fall back to a (presumably slower or otherwise less desirable) alternative technique can be initiated or else the program may be set to run with reduced functionality. * In other cases, an

operating system An operating system (OS) is system software that manages computer hardware, software resources, and provides common services for computer programs. Time-sharing operating systems schedule tasks for efficient use of the system and may also i ...

may mimic the new features for older processors, though often with reduced performance. By using a

lowest common denominator In mathematics, the lowest common denominator or least common denominator (abbreviated LCD) is the lowest common multiple of the denominators of a set of fractions. It simplifies adding, subtracting, and comparing fractions. Description The low ...

strategy (avoiding use of processor supplementary capabilities), programs can be kept portable across all machines of the same architecture.http://markhobley.yi.org/glossary/supplementarycapability.html

CPU families affected

Some popular processor architectures such as

x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was intr ...

68000 The Motorola 68000 (sometimes shortened to Motorola 68k or m68k and usually pronounced "sixty-eight-thousand") is a 16/32-bit complex instruction set computer (CISC) microprocessor, introduced in 1979 by Motorola Semiconductor Products Secto ...

, and MIPS have seen many new capabilities introduced over several generations of design. Some of these capabilities have then seen widespread adoption by programmers, spurring consumer upgrades and making the previous generations of processors obsolete.

x86 capability flags

Supplementary Capabilities Not Represented By Flags

Include (not full list): *

3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...

Page Attribute Table The page attribute table (PAT) is a processor supplementary capability extension to the page table format of certain x86 and x86-64 microprocessors. Like memory type range registers (MTRRs), they allow for fine-grained control over how areas of ...

(PAT) * MMX * SSE (and later variants up to

SSE5 The SSE5 (short for Streaming SIMD Extensions version 5) was a SIMD instruction set extension proposed by AMD on August 30, 2007 as a supplement to the 128-bit SSE core instructions in the AMD64 architecture. AMD chose not to implement SSE5 as or ...

) * AVX *

AVX2 Advanced Vector Extensions (AVX) are extensions to the x86 instruction set architecture for microprocessors from Intel and Advanced Micro Devices (AMD). They were proposed by Intel in March 2008 and first supported by Intel with the Sandy Bridge ...

AVX-512 AVX-512 are 512-bit extensions to the 256-bit Advanced Vector Extensions SIMD instructions for x86 instruction set architecture (ISA) proposed by Intel in July 2013, and implemented in Intel's Xeon Phi x200 (Knights Landing) and Skylake-X CPUs; t ...

Processor Supplementary Instructions

Processor Supplementary Instructions are instructions that have been implemented on certain processors within a family, but are not present on all processors within a particular family.

IA-32

The following instructions are considered to be processor supplementary instructions on

IA-32 IA-32 (short for "Intel Architecture, 32-bit", commonly called i386) is the 32-bit version of the x86 instruction set architecture, designed by Intel and first implemented in the 80386 microprocessor in 1985. IA-32 is the first incarnation o ...

architecture. These instructions were added to later production processors, and are not part of the original IA-32 instruction set. Programs containing these instructions may not operate correctly on all machines in the IA-32 family:

FPU and MMU capability

The FPU (Floating Point Unit) maths co-processing capability is available on all x86 processors since the 80486DX series. The FPU and MMU instruction sets (for the x86 family) have not been considered supplementary instructions since their introduction due to their importance to core CPU functionality.

References

{{Multimedia extensions Central processing unit